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Searched refs:D0_NR_SHIFT (Results 1 – 11 of 11) sorted by relevance

/external/igt-gpu-tools/lib/
Drendercopy_i915.c186 REG_NR(FS_T0) << D0_NR_SHIFT | in gen3_render_copyfunc()
193 (REG_NR(FS_S0) << D0_NR_SHIFT) | in gen3_render_copyfunc()
Di915_3d.h210 #define D0_NR_SHIFT 14 macro
361 (REG_NR(reg) << D0_NR_SHIFT) | \
Di915_reg.h659 #define D0_NR_SHIFT 14 macro
/external/igt-gpu-tools/tests/i915/
Dgen3_render_linear_blits.c199 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()
206 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()
Dgen3_render_tiledy_blits.c199 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()
206 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()
Dgen3_render_tiledx_blits.c199 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()
206 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()
Dgen3_render_mixed_blits.c212 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()
219 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()
Dgen3_mixed_blits.c225 REG_NR(FS_T0) << D0_NR_SHIFT | in render_copy()
232 (REG_NR(FS_S0) << D0_NR_SHIFT) | in render_copy()
/external/mesa3d/src/mesa/drivers/dri/i915/
Di915_reg.h547 #define D0_NR_SHIFT 14 macro
/external/mesa3d/src/gallium/drivers/i915/
Di915_reg.h675 #define D0_NR_SHIFT 14 macro
Di915_fpc_translate.c61 (T_DIFFUSE << D0_NR_SHIFT) |