Searched refs:DFLL_OUTPUT_CFG_CLK_EN_BIT (Results 1 – 2 of 2) sorted by relevance
235 if (cfg & DFLL_OUTPUT_CFG_CLK_EN_BIT) { in tegra_soc_pwr_domain_suspend()514 if (cfg & DFLL_OUTPUT_CFG_CLK_EN_BIT) { in tegra_soc_pwr_domain_on_finish()
264 #define DFLL_OUTPUT_CFG_CLK_EN_BIT (U(1) << 6) macro