Searched refs:DRVCTRL0_MASK (Results 1 – 6 of 6) sorted by relevance
208 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro913 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_h3_v2()
206 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro880 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_h3_v1()
210 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro915 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_m3n()
211 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro997 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_g2m()
211 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro1008 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_m3()
211 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro