Searched refs:DRVCTRL0_QSPI0_SPCLK (Results 1 – 6 of 6) sorted by relevance
234 #define DRVCTRL0_QSPI0_SPCLK(x) ((uint32_t)(x) << 28U) macro913 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_h3_v2()
232 #define DRVCTRL0_QSPI0_SPCLK(x) ((uint32_t)(x) << 28U) macro880 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_h3_v1()
236 #define DRVCTRL0_QSPI0_SPCLK(x) ((uint32_t)(x) << 28U) macro915 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_m3n()
237 #define DRVCTRL0_QSPI0_SPCLK(x) ((uint32_t)(x) << 28U) macro997 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_g2m()
237 #define DRVCTRL0_QSPI0_SPCLK(x) ((uint32_t)(x) << 28U) macro1008 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_m3()
237 #define DRVCTRL0_QSPI0_SPCLK(x) ((uint32_t)(x) << 28U) macro