Searched refs:DRVCTRL18_MASK (Results 1 – 6 of 6) sorted by relevance
226 #define DRVCTRL18_MASK (0x88888888U) macro1089 reg = ((reg & DRVCTRL18_MASK) | DRVCTRL18_RTS0_TANS(7) in pfc_init_h3_v2()
224 #define DRVCTRL18_MASK (0x88888888U) macro1056 reg = ((reg & DRVCTRL18_MASK) | DRVCTRL18_RTS0_TANS(7) in pfc_init_h3_v1()
228 #define DRVCTRL18_MASK (0x88888888U) macro1091 reg = ((reg & DRVCTRL18_MASK) | DRVCTRL18_RTS0_TANS(7) in pfc_init_m3n()
229 #define DRVCTRL18_MASK (0x88888888U) macro1173 reg = ((reg & DRVCTRL18_MASK) | DRVCTRL18_RTS0_TANS(7) in pfc_init_g2m()
229 #define DRVCTRL18_MASK (0x88888888U) macro1184 reg = ((reg & DRVCTRL18_MASK) | DRVCTRL18_RTS0_TANS(7) in pfc_init_m3()
229 #define DRVCTRL18_MASK (0x88888888U) macro