Searched refs:DRVCTRL19_HSCK0 (Results 1 – 6 of 6) sorted by relevance
382 #define DRVCTRL19_HSCK0(x) ((uint32_t)(x) << 28U) macro1099 reg = ((reg & DRVCTRL19_MASK) | DRVCTRL19_HSCK0(7) in pfc_init_h3_v2()
380 #define DRVCTRL19_HSCK0(x) ((uint32_t)(x) << 28U) macro1066 reg = ((reg & DRVCTRL19_MASK) | DRVCTRL19_HSCK0(7) in pfc_init_h3_v1()
384 #define DRVCTRL19_HSCK0(x) ((uint32_t)(x) << 28U) macro1101 reg = ((reg & DRVCTRL19_MASK) | DRVCTRL19_HSCK0(7) in pfc_init_m3n()
385 #define DRVCTRL19_HSCK0(x) ((uint32_t)(x) << 28U) macro1183 reg = ((reg & DRVCTRL19_MASK) | DRVCTRL19_HSCK0(7) in pfc_init_g2m()
385 #define DRVCTRL19_HSCK0(x) ((uint32_t)(x) << 28U) macro1194 reg = ((reg & DRVCTRL19_MASK) | DRVCTRL19_HSCK0(7) in pfc_init_m3()
385 #define DRVCTRL19_HSCK0(x) ((uint32_t)(x) << 28U) macro