Home
last modified time | relevance | path

Searched refs:EMIT (Results 1 – 25 of 30) sorted by relevance

12

/external/mesa3d/src/gallium/tests/graw/geometry-shader/
Dmulti-line.txt16 EMIT
19 EMIT
22 EMIT
25 EMIT
30 EMIT
33 EMIT
36 EMIT
39 EMIT
Dline.txt12 EMIT
16 EMIT
20 EMIT
24 EMIT
Dmov.txt12 EMIT
16 EMIT
20 EMIT
Dadd-mix.txt12 EMIT
16 EMIT
20 EMIT
Dmov-cb-2d.txt13 EMIT
17 EMIT
21 EMIT
Dadd.txt12 EMIT
16 EMIT
20 EMIT
/external/cldr/tools/java/org/unicode/cldr/draft/keyboard/test/
DKeyboardSettingsTest.java14 TransformFailureSetting.EMIT, TransformPartialSetting.SHOW); in testKeyboardSettings()
16 assertEquals("", TransformFailureSetting.EMIT, settings.transformFailureSetting()); in testKeyboardSettings()
22 TransformFailureSetting.EMIT, TransformPartialSetting.SHOW); in testEqualsTrue()
24 TransformFailureSetting.EMIT, TransformPartialSetting.SHOW); in testEqualsTrue()
31 TransformFailureSetting.EMIT, TransformPartialSetting.SHOW); in testEqualsFalse()
33 TransformFailureSetting.EMIT, TransformPartialSetting.SHOW); in testEqualsFalse()
/external/llvm-project/llvm/unittests/Transforms/Vectorize/
DVPlanHCFGTest.cpp111 "EMIT ir<%indvars.iv> = phi ir<0> ir<%indvars.iv.next>\l" + in TEST_F()
112 "EMIT ir<%arr.idx> = getelementptr ir<%A> ir<%indvars.iv>\l" + in TEST_F()
113 "EMIT ir<%l1> = load ir<%arr.idx>\l" + in TEST_F()
114 "EMIT ir<%res> = add ir<%l1> ir<10>\l" + in TEST_F()
115 "EMIT store ir<%res> ir<%arr.idx>\l" + in TEST_F()
116 "EMIT ir<%indvars.iv.next> = add ir<%indvars.iv> ir<1>\l" + in TEST_F()
117 "EMIT ir<%exitcond> = icmp ir<%indvars.iv.next> ir<%N>\l" + in TEST_F()
124 "EMIT ret\l" in TEST_F()
DVPlanTest.cpp329 "EMIT vp<%0> = add\l" + in TEST()
330 "EMIT vp<%1> = sub vp<%0>\l" + in TEST()
331 "EMIT br vp<%0> vp<%1>\l" in TEST()
336 "EMIT vp<%2> = mul vp<%1> vp<%0>\l" + in TEST()
337 "EMIT ret vp<%2>\l" in TEST()
/external/llvm-project/llvm/lib/Support/
Dregcomp.c267 #define EMIT(op, sopnd) doemit(p, (sop)(op), (size_t)(sopnd)) macro
270 #define ASTERN(sop, pos) EMIT(sop, HERE()-pos)
357 EMIT(OEND, 0); in llvm_regcomp()
365 EMIT(OEND, 0); in llvm_regcomp()
421 EMIT(OOR2, 0); /* offset is very wrong */ in p_ere()
457 EMIT(OLPAREN, subno); in p_ere_exp()
464 EMIT(ORPAREN, subno); in p_ere_exp()
480 EMIT(OBOL, 0); in p_ere_exp()
486 EMIT(OEOL, 0); in p_ere_exp()
502 EMIT(OANY, 0); in p_ere_exp()
[all …]
/external/swiftshader/third_party/llvm-subzero/lib/Support/
Dregcomp.c139 #define EMIT(op, sopnd) doemit(p, (sop)(op), (size_t)(sopnd)) macro
142 #define ASTERN(sop, pos) EMIT(sop, HERE()-pos)
229 EMIT(OEND, 0); in llvm_regcomp()
237 EMIT(OEND, 0); in llvm_regcomp()
293 EMIT(OOR2, 0); /* offset is very wrong */ in p_ere()
329 EMIT(OLPAREN, subno); in p_ere_exp()
336 EMIT(ORPAREN, subno); in p_ere_exp()
352 EMIT(OBOL, 0); in p_ere_exp()
358 EMIT(OEOL, 0); in p_ere_exp()
374 EMIT(OANY, 0); in p_ere_exp()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
Dregcomp.c267 #define EMIT(op, sopnd) doemit(p, (sop)(op), (size_t)(sopnd)) macro
270 #define ASTERN(sop, pos) EMIT(sop, HERE()-pos)
357 EMIT(OEND, 0); in llvm_regcomp()
365 EMIT(OEND, 0); in llvm_regcomp()
421 EMIT(OOR2, 0); /* offset is very wrong */ in p_ere()
457 EMIT(OLPAREN, subno); in p_ere_exp()
464 EMIT(ORPAREN, subno); in p_ere_exp()
480 EMIT(OBOL, 0); in p_ere_exp()
486 EMIT(OEOL, 0); in p_ere_exp()
502 EMIT(OANY, 0); in p_ere_exp()
[all …]
/external/llvm/lib/Support/
Dregcomp.c139 #define EMIT(op, sopnd) doemit(p, (sop)(op), (size_t)(sopnd)) macro
142 #define ASTERN(sop, pos) EMIT(sop, HERE()-pos)
229 EMIT(OEND, 0); in llvm_regcomp()
237 EMIT(OEND, 0); in llvm_regcomp()
293 EMIT(OOR2, 0); /* offset is very wrong */ in p_ere()
329 EMIT(OLPAREN, subno); in p_ere_exp()
336 EMIT(ORPAREN, subno); in p_ere_exp()
352 EMIT(OBOL, 0); in p_ere_exp()
358 EMIT(OEOL, 0); in p_ere_exp()
374 EMIT(OANY, 0); in p_ere_exp()
[all …]
/external/libcups/vcnet/regex/
Dregcomp.c58 #define EMIT(op, sopnd) doemit(p, (sop)(op), (size_t)(sopnd)) macro
61 #define ASTERN(sop, pos) EMIT(sop, HERE()-pos)
153 EMIT(OEND, 0);
161 EMIT(OEND, 0);
220 EMIT(OOR2, 0); /* offset is very wrong */
257 EMIT(OLPAREN, subno);
264 EMIT(ORPAREN, subno);
280 EMIT(OBOL, 0);
286 EMIT(OEOL, 0);
302 EMIT(OANY, 0);
[all …]
/external/llvm/test/Transforms/GCOVProfiling/
Dmodules.ll1 ; RUN: opt -insert-gcov-profiling -o - < %s | llvm-dis | FileCheck -check-prefix=EMIT-ARCS %s
2 ; RUN: opt -passes=insert-gcov-profiling -o - < %s | llvm-dis | FileCheck -check-prefix=EMIT-ARCS %s
4 ; EMIT-ARCS-NOT: call void @llvm_gcda_start_file
/external/llvm-project/llvm/test/Transforms/GCOVProfiling/
Dmodules.ll1 ; RUN: opt -insert-gcov-profiling -o - < %s | llvm-dis | FileCheck -check-prefix=EMIT-ARCS %s
2 ; RUN: opt -passes=insert-gcov-profiling -o - < %s | llvm-dis | FileCheck -check-prefix=EMIT-ARCS %s
4 ; EMIT-ARCS-NOT: call void @llvm_gcda_start_file
/external/llvm/test/CodeGen/Mips/
Dno-odd-spreg.ll1 …N: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefixes=ALL,ODDSPREG,ODDSPREG-NO-EMIT
3 …mipsel -mcpu=mips32r6 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,ODDSPREG,ODDSPREG-NO-EMIT
5 …cpu=mips32r6 -mattr=fpxx,-nooddspreg < %s | FileCheck %s -check-prefixes=ALL,ODDSPREG,ODDSPREG-EMIT
9 ; ODDSPREG-EMIT: .module oddspreg
10 ; ODDSPREG-NO-EMIT-NOT: .module oddspreg
/external/llvm-project/llvm/test/CodeGen/Mips/
Dno-odd-spreg.ll2 ; RUN: | FileCheck %s -check-prefixes=ALL,ODDSPREG,ODDSPREG-NO-EMIT
6 ; RUN: | FileCheck %s -check-prefixes=ALL,ODDSPREG,ODDSPREG-NO-EMIT
10 ; RUN: | FileCheck %s -check-prefixes=ALL,ODDSPREG,ODDSPREG-EMIT
14 ; ODDSPREG-EMIT: .module oddspreg
15 ; ODDSPREG-NO-EMIT-NOT: .module oddspreg
/external/llvm-project/clang/test/ASTMerge/APValue/
DAPValue.cpp6 #ifndef EMIT
7 #define EMIT macro
/external/cldr/tools/java/org/unicode/cldr/draft/keyboard/
DKeyboardId.java118 …lSetting.HIDE)), OSX(10.9f, KeyboardSettings.of(FallbackSetting.BASE, TransformFailureSetting.EMIT,
119 …etting.SHOW)), WINDOWS(10f, KeyboardSettings.of(FallbackSetting.OMIT, TransformFailureSetting.EMIT,
DKeyboardSettings.java91 EMIT, OMIT, NONE; enumConstant
/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_opcode_tmp.h135 OP01(EMIT)
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_opcode_tmp.h120 OP01(EMIT)
Dtgsi_info_opcodes.h98 OPCODE(0, 1, NONE, EMIT)
/external/llvm-project/llvm/test/Transforms/LoopVectorize/
Dvplan-printing.ll126 ; CHECK-NEXT: "EMIT vp<%0> = not ir<%cmp>\l" +

12