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Searched refs:EXTLOAD (Results 1 – 25 of 119) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp101 setLoadExtAction(ISD::EXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
120 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in AMDGPUTargetLowering()
121 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Legal); in AMDGPUTargetLowering()
122 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Legal); in AMDGPUTargetLowering()
123 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
127 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
130 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand); in AMDGPUTargetLowering()
133 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i16, Expand); in AMDGPUTargetLowering()
136 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i16, Expand); in AMDGPUTargetLowering()
141 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); in AMDGPUTargetLowering()
[all …]
DR600ISelLowering.cpp61 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in R600TargetLowering()
62 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Custom); in R600TargetLowering()
63 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Custom); in R600TargetLowering()
67 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
71 setLoadExtAction(ISD::EXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
1649 SDValue NewLoad = DAG.getExtLoad(ISD::EXTLOAD, DL, VT, Chain, Ptr, in LowerLOAD()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp109 setLoadExtAction(ISD::EXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
128 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in AMDGPUTargetLowering()
129 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Legal); in AMDGPUTargetLowering()
130 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Legal); in AMDGPUTargetLowering()
131 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
135 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
138 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand); in AMDGPUTargetLowering()
141 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i16, Expand); in AMDGPUTargetLowering()
144 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v3i16, Expand); in AMDGPUTargetLowering()
147 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i16, Expand); in AMDGPUTargetLowering()
[all …]
DR600ISelLowering.cpp87 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in R600TargetLowering()
88 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Custom); in R600TargetLowering()
89 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Custom); in R600TargetLowering()
93 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
97 setLoadExtAction(ISD::EXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
1506 ISD::EXTLOAD, DL, VT, Chain, Ptr, LoadNode->getPointerInfo(), MemVT, in LowerLOAD()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp131 setLoadExtAction(ISD::EXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
150 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in AMDGPUTargetLowering()
151 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Legal); in AMDGPUTargetLowering()
152 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Legal); in AMDGPUTargetLowering()
153 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
157 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
160 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand); in AMDGPUTargetLowering()
163 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i16, Expand); in AMDGPUTargetLowering()
166 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v3i16, Expand); in AMDGPUTargetLowering()
169 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i16, Expand); in AMDGPUTargetLowering()
[all …]
DR600ISelLowering.cpp87 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in R600TargetLowering()
88 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Custom); in R600TargetLowering()
89 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Custom); in R600TargetLowering()
93 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
97 setLoadExtAction(ISD::EXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
1512 ISD::EXTLOAD, DL, VT, Chain, Ptr, LoadNode->getPointerInfo(), MemVT, in LowerLOAD()
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h828 EXTLOAD, enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h1024 EXTLOAD, enumerator
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h1243 enum LoadExtType { NON_EXTLOAD = 0, EXTLOAD, SEXTLOAD, ZEXTLOAD }; enumerator
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp685 case ISD::EXTLOAD: OS << ", anyext"; break; in print_details()
717 case ISD::EXTLOAD: OS << ", anyext"; break; in print_details()
754 case ISD::EXTLOAD: OS << ", anyext"; break; in print_details()
DLegalizeDAG.cpp321 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
336 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
749 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; in LegalizeLoadOps()
877 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
921 assert(ExtType != ISD::EXTLOAD && in LegalizeLoadOps()
925 SDValue Result = DAG.getExtLoad(ISD::EXTLOAD, dl, in LegalizeLoadOps()
1367 NewLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, Op.getValueType(), Ch, StackPtr, in ExpandExtractFromVectorThroughStack()
1517 State.IntValue = DAG.getExtLoad(ISD::EXTLOAD, DL, LoadTy, State.Chain, IntPtr, in getSignAsIntValue()
1844 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT, in EmitStackConvert()
2585 ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx, in ExpandLegalINT_TO_FP()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp107 setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand); in WebAssemblyTargetLowering()
245 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in WebAssemblyTargetLowering()
248 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
256 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
263 for (auto Ext : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) { in WebAssemblyTargetLowering()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp130 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in WebAssemblyTargetLowering()
133 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp661 case ISD::EXTLOAD: OS << ", anyext"; break; in print_details()
693 case ISD::EXTLOAD: OS << ", anyext"; break; in print_details()
DLegalizeDAG.cpp319 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
334 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
749 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; in LegalizeLoadOps()
878 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
922 assert(ExtType != ISD::EXTLOAD && in LegalizeLoadOps()
926 SDValue Result = DAG.getExtLoad(ISD::EXTLOAD, dl, in LegalizeLoadOps()
1347 NewLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, Op.getValueType(), Ch, StackPtr, in ExpandExtractFromVectorThroughStack()
1486 State.IntValue = DAG.getExtLoad(ISD::EXTLOAD, DL, LoadTy, State.Chain, IntPtr, in getSignAsIntValue()
1787 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT, in EmitStackConvert()
2468 ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx, in ExpandLegalINT_TO_FP()
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp107 setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand); in WebAssemblyTargetLowering()
233 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in WebAssemblyTargetLowering()
236 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
244 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
250 for (auto Ext : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) { in WebAssemblyTargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp450 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); in NVPTXTargetLowering()
451 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand); in NVPTXTargetLowering()
452 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in NVPTXTargetLowering()
453 setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, MVT::v2f16, Expand); in NVPTXTargetLowering()
454 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f16, Expand); in NVPTXTargetLowering()
455 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f32, Expand); in NVPTXTargetLowering()
456 setLoadExtAction(ISD::EXTLOAD, MVT::v4f32, MVT::v4f16, Expand); in NVPTXTargetLowering()
457 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f16, Expand); in NVPTXTargetLowering()
458 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f32, Expand); in NVPTXTargetLowering()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp210 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); in NVPTXTargetLowering()
211 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand); in NVPTXTargetLowering()
212 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in NVPTXTargetLowering()
213 setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, MVT::v2f16, Expand); in NVPTXTargetLowering()
214 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f16, Expand); in NVPTXTargetLowering()
215 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f32, Expand); in NVPTXTargetLowering()
216 setLoadExtAction(ISD::EXTLOAD, MVT::v4f32, MVT::v4f16, Expand); in NVPTXTargetLowering()
217 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f16, Expand); in NVPTXTargetLowering()
218 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f32, Expand); in NVPTXTargetLowering()
/external/llvm-project/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp434 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); in NVPTXTargetLowering()
435 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand); in NVPTXTargetLowering()
436 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in NVPTXTargetLowering()
437 setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, MVT::v2f16, Expand); in NVPTXTargetLowering()
438 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f16, Expand); in NVPTXTargetLowering()
439 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f32, Expand); in NVPTXTargetLowering()
440 setLoadExtAction(ISD::EXTLOAD, MVT::v4f32, MVT::v4f16, Expand); in NVPTXTargetLowering()
441 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f16, Expand); in NVPTXTargetLowering()
442 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f32, Expand); in NVPTXTargetLowering()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp269 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
283 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
705 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; in LegalizeLoadOps()
841 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
886 assert(ExtType != ISD::EXTLOAD && in LegalizeLoadOps()
890 SDValue Result = DAG.getExtLoad(ISD::EXTLOAD, dl, in LegalizeLoadOps()
1239 ISD::EXTLOAD, dl, Op.getValueType(), Ch, StackPtr, MachinePointerInfo(), in ExpandExtractFromVectorThroughStack()
1410 State.IntValue = DAG.getExtLoad(ISD::EXTLOAD, DL, LoadTy, State.Chain, in getSignAsIntValue()
1704 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, in EmitStackConvert()
2459 ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx, in ExpandLegalINT_TO_FP()
DLegalizeVectorOps.cpp550 ScalarLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, WideVT, Chain, BasePTR, in ExpandLoad()
604 case ISD::EXTLOAD: in ExpandLoad()
DSelectionDAGDumper.cpp502 case ISD::EXTLOAD: OS << ", anyext"; break; in print_details()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp124 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in XCoreTargetLowering()
453 DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, HighAddr, in LowerLOAD()
955 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD()
961 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD()
/external/llvm-project/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp124 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in XCoreTargetLowering()
452 DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, HighAddr, in LowerLOAD()
954 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD()
960 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD()
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp127 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in XCoreTargetLowering()
467 SDValue High = DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, in LowerLOAD()
984 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD()
990 return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), in LowerATOMIC_LOAD()

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