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Searched refs:EXTRQI (Results 1 – 25 of 33) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/X86/
Dvector-shuffle-combining-sse4a.ll7 ; Combine tests involving SSE4A target shuffles (EXTRQI,INSERTQI)
Dvector-shuffle-sse4a.ll7 ; EXTRQI
/external/llvm/lib/Target/X86/
DX86ISelLowering.h449 EXTRQI, INSERTQI, enumerator
DX86InstrFragmentsSIMD.td302 def X86extrqi : SDNode<"X86ISD::EXTRQI",
DX86IntrinsicsInfo.h1937 X86_INTRINSIC_DATA(sse4a_extrqi, INTR_TYPE_3OP, X86ISD::EXTRQI, 0),
DX86ISelLowering.cpp7973 return DAG.getNode(X86ISD::EXTRQI, DL, VT, Src, in lowerVectorShuffleWithSSE4A()
8144 MVT::v2i64, DAG.getNode(X86ISD::EXTRQI, DL, VT, InputV, in lowerVectorShuffleAsSpecificZeroOrAnyExtend()
8154 MVT::v2i64, DAG.getNode(X86ISD::EXTRQI, DL, VT, InputV, in lowerVectorShuffleAsSpecificZeroOrAnyExtend()
22147 case X86ISD::EXTRQI: return "X86ISD::EXTRQI"; in getTargetNodeName()
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h512 EXTRQI, enumerator
DX86ScheduleBdVer2.td1219 def : InstRW<[PdWriteEXTRQ], (instrs EXTRQ, EXTRQI)>;
DX86IntrinsicsInfo.h1100 X86_INTRINSIC_DATA(sse4a_extrqi, INTR_TYPE_3OP, X86ISD::EXTRQI, 0),
DX86InstrFragmentsSIMD.td316 def X86extrqi : SDNode<"X86ISD::EXTRQI",
DX86ISelLowering.cpp4791 case X86ISD::EXTRQI: in isTargetShuffle()
6914 case X86ISD::EXTRQI: in getTargetShuffleMask()
12870 return DAG.getNode(X86ISD::EXTRQI, DL, VT, V1, in lowerShuffleWithSSE4A()
12974 MVT::v2i64, DAG.getNode(X86ISD::EXTRQI, DL, VT, InputV, in lowerShuffleAsSpecificZeroOrAnyExtend()
12983 MVT::v2i64, DAG.getNode(X86ISD::EXTRQI, DL, VT, InputV, in lowerShuffleAsSpecificZeroOrAnyExtend()
30813 NODE_NAME_CASE(EXTRQI) in getTargetNodeName()
35437 if (Depth == 0 && Root.getOpcode() == X86ISD::EXTRQI) in combineX86ShuffleChain()
35440 Res = DAG.getNode(X86ISD::EXTRQI, DL, IntMaskVT, V1, in combineX86ShuffleChain()
49827 case X86ISD::EXTRQI: in PerformDAGCombine()
/external/llvm/test/Transforms/InstCombine/
Dx86-sse4a.ll59 ; EXTRQI
/external/llvm/test/CodeGen/X86/
Dvector-shuffle-sse4a.ll6 ; EXTRQI
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h437 EXTRQI, INSERTQI, enumerator
DX86IntrinsicsInfo.h1094 X86_INTRINSIC_DATA(sse4a_extrqi, INTR_TYPE_3OP, X86ISD::EXTRQI, 0),
DX86ScheduleBdVer2.td1184 def : InstRW<[PdWriteEXTRQ], (instrs EXTRQ, EXTRQI)>;
DX86InstrFragmentsSIMD.td307 def X86extrqi : SDNode<"X86ISD::EXTRQI",
DX86ISelLowering.cpp4694 case X86ISD::EXTRQI: in isTargetShuffle()
6630 case X86ISD::EXTRQI: in getTargetShuffleMask()
12124 return DAG.getNode(X86ISD::EXTRQI, DL, VT, V1, in lowerShuffleWithSSE4A()
12228 MVT::v2i64, DAG.getNode(X86ISD::EXTRQI, DL, VT, InputV, in lowerShuffleAsSpecificZeroOrAnyExtend()
12237 MVT::v2i64, DAG.getNode(X86ISD::EXTRQI, DL, VT, InputV, in lowerShuffleAsSpecificZeroOrAnyExtend()
29668 case X86ISD::EXTRQI: return "X86ISD::EXTRQI"; in getTargetNodeName()
33579 if (Depth == 0 && Root.getOpcode() == X86ISD::EXTRQI) in combineX86ShuffleChain()
33582 Res = DAG.getNode(X86ISD::EXTRQI, DL, IntMaskVT, V1, in combineX86ShuffleChain()
46041 case X86ISD::EXTRQI: in PerformDAGCombine()
/external/llvm-project/llvm/test/Transforms/InstCombine/X86/
Dx86-sse4a.ll73 ; EXTRQI
/external/llvm/lib/Target/X86/InstPrinter/
DX86InstComments.cpp924 case X86::EXTRQI: in EmitAnyX86InstComments()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86InstComments.cpp1128 case X86::EXTRQI: in EmitAnyX86InstComments()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86InstComments.cpp1267 case X86::EXTRQI: in EmitAnyX86InstComments()
/external/capstone/arch/X86/
DX86GenAsmWriter1.inc766 2786120847U, // EXTRQI
9623 112U, // EXTRQI
19442 // EXTRQI, MMX_PSLLDri, MMX_PSLLQri, MMX_PSLLWri, MMX_PSRADri, MMX_PSRAWr...
DX86GenAsmWriter.inc766 52828644U, // EXTRQI
9623 0U, // EXTRQI
19975 // EXTRQI
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenAsmWriter.inc2617 273325364U, // EXTRQI
17868 1U, // EXTRQI
33119 0U, // EXTRQI
48244 // EXTRQI

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