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Searched refs:EarlyClobber (Results 1 – 24 of 24) sorted by relevance

/external/llvm/utils/TableGen/
DCodeGenInstruction.h33 enum { None, EarlyClobber, Tied } Kind; enumerator
40 I.Kind = EarlyClobber; in getEarlyClobber()
53 bool isEarlyClobber() const { return Kind == EarlyClobber; } in isEarlyClobber()
/external/llvm-project/llvm/utils/TableGen/
DCodeGenInstruction.h33 enum { None, EarlyClobber, Tied } Kind = None; enumerator
41 I.Kind = EarlyClobber; in getEarlyClobber()
54 bool isEarlyClobber() const { return Kind == EarlyClobber; } in isEarlyClobber()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIFormMemoryClauses.cpp147 S |= RegState::EarlyClobber; in getMopState()
377 unsigned S = R.second.first | RegState::EarlyClobber; in runOnMachineFunction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIFormMemoryClauses.cpp147 S |= RegState::EarlyClobber; in getMopState()
377 unsigned S = R.second.first | RegState::EarlyClobber; in runOnMachineFunction()
/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h38 EarlyClobber = 0x40, enumerator
79 flags & RegState::EarlyClobber,
/external/llvm-project/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h55 EarlyClobber = 0x40, enumerator
108 flags & RegState::EarlyClobber,
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h49 EarlyClobber = 0x40, enumerator
98 flags & RegState::EarlyClobber,
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DInlineAsmLowering.cpp425 (OpInfo.isEarlyClobber ? RegState::EarlyClobber : 0)); in lowerInlineAsm()
586 Inst.addReg(Reg, RegState::Define | RegState::EarlyClobber | in lowerInlineAsm()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsISelLowering.cpp1599 .addReg(OldVal, RegState::Define | RegState::EarlyClobber) in emitAtomicBinary()
1602 .addReg(Scratch, RegState::Define | RegState::EarlyClobber | in emitAtomicBinary()
1607 MIB.addReg(Scratch2, RegState::Define | RegState::EarlyClobber | in emitAtomicBinary()
1809 .addReg(Dest, RegState::Define | RegState::EarlyClobber) in emitAtomicBinaryPartword()
1815 .addReg(Scratch, RegState::EarlyClobber | RegState::Define | in emitAtomicBinaryPartword()
1817 .addReg(Scratch2, RegState::EarlyClobber | RegState::Define | in emitAtomicBinaryPartword()
1819 .addReg(Scratch3, RegState::EarlyClobber | RegState::Define | in emitAtomicBinaryPartword()
1823 MIB.addReg(Scratch4, RegState::EarlyClobber | RegState::Define | in emitAtomicBinaryPartword()
1882 .addReg(Dest, RegState::Define | RegState::EarlyClobber) in emitAtomicCmpSwap()
1886 .addReg(Scratch, RegState::EarlyClobber | RegState::Define | in emitAtomicCmpSwap()
[all …]
/external/llvm-project/llvm/lib/Target/Mips/
DMipsISelLowering.cpp1597 .addReg(OldVal, RegState::Define | RegState::EarlyClobber) in emitAtomicBinary()
1600 .addReg(Scratch, RegState::Define | RegState::EarlyClobber | in emitAtomicBinary()
1605 MIB.addReg(Scratch2, RegState::Define | RegState::EarlyClobber | in emitAtomicBinary()
1807 .addReg(Dest, RegState::Define | RegState::EarlyClobber) in emitAtomicBinaryPartword()
1813 .addReg(Scratch, RegState::EarlyClobber | RegState::Define | in emitAtomicBinaryPartword()
1815 .addReg(Scratch2, RegState::EarlyClobber | RegState::Define | in emitAtomicBinaryPartword()
1817 .addReg(Scratch3, RegState::EarlyClobber | RegState::Define | in emitAtomicBinaryPartword()
1821 MIB.addReg(Scratch4, RegState::EarlyClobber | RegState::Define | in emitAtomicBinaryPartword()
1880 .addReg(Dest, RegState::Define | RegState::EarlyClobber) in emitAtomicCmpSwap()
1884 .addReg(Scratch, RegState::EarlyClobber | RegState::Define | in emitAtomicCmpSwap()
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp807 RegState::EarlyClobber); in EmitMachineNode()
989 MIB.addReg(Reg, RegState::Define | RegState::EarlyClobber | in EmitSpecialNode()
/external/llvm-project/llvm/lib/CodeGen/
DLiveInterval.cpp993 bool EarlyClobber = MO.isEarlyClobber(); in computeSubRangeUndefs() local
994 SlotIndex Pos = Indexes.getInstructionIndex(MI).getRegSlot(EarlyClobber); in computeSubRangeUndefs()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp904 RegState::EarlyClobber); in EmitMachineNode()
1104 RegState::Define | RegState::EarlyClobber | in EmitSpecialNode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DLiveInterval.cpp993 bool EarlyClobber = MO.isEarlyClobber(); in computeSubRangeUndefs() local
994 SlotIndex Pos = Indexes.getInstructionIndex(MI).getRegSlot(EarlyClobber); in computeSubRangeUndefs()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp971 RegState::EarlyClobber); in EmitMachineNode()
1201 RegState::Define | RegState::EarlyClobber | in EmitSpecialNode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFISelLowering.cpp611 RegState::Define | RegState::Dead | RegState::EarlyClobber); in EmitInstrWithCustomInserterMemcpy()
/external/clang/lib/CodeGen/
DCGStmt.cpp1680 const AsmStmt &Stmt, const bool EarlyClobber) { in AddVariableConstraints() argument
1705 return (EarlyClobber ? "&{" : "{") + Register.str() + "}"; in AddVariableConstraints()
/external/llvm/lib/CodeGen/MIRParser/
DMIParser.cpp857 Flags |= RegState::EarlyClobber; in parseRegisterFlag()
992 Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug, in parseRegisterOperand()
/external/llvm-project/llvm/lib/Target/BPF/
DBPFISelLowering.cpp650 RegState::Define | RegState::Dead | RegState::EarlyClobber); in EmitInstrWithCustomInserterMemcpy()
/external/llvm/docs/
DMIRLangRef.rst434 - ``RegState::EarlyClobber``
/external/llvm-project/clang/lib/CodeGen/
DCGStmt.cpp1991 const AsmStmt &Stmt, const bool EarlyClobber, in AddVariableConstraints() argument
2019 return (EarlyClobber ? "&{" : "{") + Register.str() + "}"; in AddVariableConstraints()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/MIRParser/
DMIParser.cpp1356 Flags |= RegState::EarlyClobber; in parseRegisterFlag()
1517 Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug, in parseRegisterOperand()
/external/llvm-project/llvm/lib/CodeGen/MIRParser/
DMIParser.cpp1410 Flags |= RegState::EarlyClobber; in parseRegisterFlag()
1571 Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug, in parseRegisterOperand()
/external/llvm-project/llvm/docs/
DMIRLangRef.rst568 - ``RegState::EarlyClobber``