| /external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | irtranslator-fp-min-max-intrinsics.ll | 49 ; CHECK: [[FMINIMUM:%[0-9]+]]:_(s32) = G_FMINIMUM [[COPY]], [[COPY1]]
50 ; CHECK: $s0 = COPY [[FMINIMUM]](s32)
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 74 FUNCTION(minimum, 2, 0, experimental_constrained_minimum, FMINIMUM)
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 663 FMINIMUM, FMAXIMUM, enumerator
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| D | BasicTTIImpl.h | 1252 ISDs.push_back(ISD::FMINIMUM);
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| D | TargetLowering.h | 2263 case ISD::FMINIMUM: in isCommutativeBinOp()
|
| /external/llvm-project/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 88 DAG_FUNCTION(minimum, 2, 0, experimental_constrained_minimum, FMINIMUM)
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 838 FMINIMUM, enumerator
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| D | BasicTTIImpl.h | 1451 ISDs.push_back(ISD::FMINIMUM); in getTypeBasedIntrinsicInstrCost()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | GenericOpcodes.td | 575 // FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0
577 // semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 188 case ISD::FMINIMUM: return "fminimum"; in getOperationName()
|
| D | LegalizeVectorTypes.cpp | 118 case ISD::FMINIMUM: in ScalarizeVectorResult()
916 case ISD::FMINIMUM: in SplitVectorResult()
2085 CombineOpc = NoNaN ? ISD::FMINNUM : ISD::FMINIMUM; in SplitVecOp_VECREDUCE()
2721 case ISD::FMINIMUM: in WidenVectorResult()
|
| D | LegalizeVectorOps.cpp | 416 case ISD::FMINIMUM: in LegalizeOp()
|
| D | SelectionDAGBuilder.cpp | 3333 case SPNB_RETURNS_NAN: Opc = ISD::FMINIMUM; break; in visitSelect()
3338 else if (TLI.isOperationLegalOrCustom(ISD::FMINIMUM, VT)) in visitSelect()
3339 Opc = ISD::FMINIMUM; in visitSelect()
3342 ISD::FMINNUM : ISD::FMINIMUM; in visitSelect()
6232 setValue(&I, DAG.getNode(ISD::FMINIMUM, sdl, in visitIntrinsicCall()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 190 case ISD::FMINIMUM: return "fminimum"; in getOperationName()
|
| D | LegalizeVectorOps.cpp | 412 case ISD::FMINIMUM: in LegalizeOp()
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| D | LegalizeFloatTypes.cpp | 2236 case ISD::FMINIMUM: in PromoteFloatResult()
2601 case ISD::FMINIMUM: in SoftPromoteHalfResult()
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| D | LegalizeVectorTypes.cpp | 121 case ISD::FMINIMUM: in ScalarizeVectorResult()
977 case ISD::FMINIMUM: in SplitVectorResult()
2881 case ISD::FMINIMUM: in WidenVectorResult()
|
| /external/llvm-project/llvm/docs/GlobalISel/ |
| D | GenericOpcode.rst | 458 FMINNUM_IEEE follow IEEE 754-2008 semantics, FMINIMUM follows IEEE 754-2018
|
| /external/llvm-project/llvm/include/llvm/Target/ |
| D | GenericOpcodes.td | 745 // FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0
747 // semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 547 setOperationAction(ISD::FMINIMUM, MVT::f64, Legal); in SystemZTargetLowering()
552 setOperationAction(ISD::FMINIMUM, MVT::v2f64, Legal); in SystemZTargetLowering()
557 setOperationAction(ISD::FMINIMUM, MVT::f32, Legal); in SystemZTargetLowering()
562 setOperationAction(ISD::FMINIMUM, MVT::v4f32, Legal); in SystemZTargetLowering()
567 setOperationAction(ISD::FMINIMUM, MVT::f128, Legal); in SystemZTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 643 setOperationAction(ISD::FMINIMUM, VT, Expand); in initActions()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 102 setOperationAction(ISD::FMINIMUM, T, Legal); in WebAssemblyTargetLowering()
|
| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 552 setOperationAction(ISD::FMINIMUM, MVT::f64, Legal); in SystemZTargetLowering()
557 setOperationAction(ISD::FMINIMUM, MVT::v2f64, Legal); in SystemZTargetLowering()
562 setOperationAction(ISD::FMINIMUM, MVT::f32, Legal); in SystemZTargetLowering()
567 setOperationAction(ISD::FMINIMUM, MVT::v4f32, Legal); in SystemZTargetLowering()
572 setOperationAction(ISD::FMINIMUM, MVT::f128, Legal); in SystemZTargetLowering()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 753 setOperationAction(ISD::FMINIMUM, VT, Expand); in initActions()
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 102 setOperationAction(ISD::FMINIMUM, T, Legal); in WebAssemblyTargetLowering()
|