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Searched refs:FNEARBYINT (Results 1 – 25 of 80) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/
Dregbank-nearbyint.mir18 ; CHECK: [[FNEARBYINT:%[0-9]+]]:fpr(<4 x s16>) = G_FNEARBYINT [[COPY]]
19 ; CHECK: $d0 = COPY [[FNEARBYINT]](<4 x s16>)
40 ; CHECK: [[FNEARBYINT:%[0-9]+]]:fpr(<8 x s16>) = G_FNEARBYINT [[COPY]]
41 ; CHECK: $q0 = COPY [[FNEARBYINT]](<8 x s16>)
62 ; CHECK: [[FNEARBYINT:%[0-9]+]]:fpr(<2 x s32>) = G_FNEARBYINT [[COPY]]
63 ; CHECK: $d0 = COPY [[FNEARBYINT]](<2 x s32>)
84 ; CHECK: [[FNEARBYINT:%[0-9]+]]:fpr(<2 x s64>) = G_FNEARBYINT [[COPY]]
85 ; CHECK: $q0 = COPY [[FNEARBYINT]](<2 x s64>)
106 ; CHECK: [[FNEARBYINT:%[0-9]+]]:fpr(s32) = G_FNEARBYINT [[COPY]]
107 ; CHECK: $s0 = COPY [[FNEARBYINT]](s32)
[all …]
Dlegalize-nearbyint.mir18 ; FP16: [[FNEARBYINT:%[0-9]+]]:_(<4 x s16>) = G_FNEARBYINT [[COPY]]
19 ; FP16: $d0 = COPY [[FNEARBYINT]](<4 x s16>)
26 ; NO-FP16: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT]]
27 ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT]](s32)
58 ; FP16: [[FNEARBYINT:%[0-9]+]]:_(<8 x s16>) = G_FNEARBYINT [[COPY]]
59 ; FP16: $q0 = COPY [[FNEARBYINT]](<8 x s16>)
66 ; NO-FP16: [[FNEARBYINT:%[0-9]+]]:_(s32) = G_FNEARBYINT [[FPEXT]]
67 ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FNEARBYINT]](s32)
110 ; FP16: [[FNEARBYINT:%[0-9]+]]:_(<2 x s32>) = G_FNEARBYINT [[COPY]]
111 ; FP16: $d0 = COPY [[FNEARBYINT]](<2 x s32>)
[all …]
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h526 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
DBasicTTIImpl.h791 ISDs.push_back(ISD::FNEARBYINT); in getIntrinsicInstrCost()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DConstrainedOps.def75 FUNCTION(nearbyint, 1, 1, experimental_constrained_nearbyint, FNEARBYINT)
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h642 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
/external/llvm-project/llvm/include/llvm/IR/
DConstrainedOps.def89 DAG_FUNCTION(nearbyint, 1, 1, experimental_constrained_nearbyint, FNEARBYINT)
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h809 FNEARBYINT, enumerator
/external/llvm/lib/Target/PowerPC/
DPPCCTRLoops.cpp306 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break; in mightUseCTR()
352 Opcode = ISD::FNEARBYINT; break; in mightUseCTR()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCTargetTransformInfo.cpp318 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break; in mightUseCTR()
368 Opcode = ISD::FNEARBYINT; break; in mightUseCTR()
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCTargetTransformInfo.cpp477 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break; in mightUseCTR()
575 Opcode = ISD::FNEARBYINT; break; in mightUseCTR()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp166 case ISD::FNEARBYINT: return "fnearbyint"; in getOperationName()
DLegalizeFloatTypes.cpp92 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break; in SoftenFloatResult()
1032 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break; in ExpandFloatResult()
1878 case ISD::FNEARBYINT: in PromoteFloatResult()
DLegalizeVectorOps.cpp321 case ISD::FNEARBYINT: in LegalizeOp()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp87 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp209 case ISD::FNEARBYINT: return "fnearbyint"; in getOperationName()
DLegalizeFloatTypes.cpp99 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break; in SoftenFloatResult()
1161 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break; in ExpandFloatResult()
2116 case ISD::FNEARBYINT: in PromoteFloatResult()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp211 case ISD::FNEARBYINT: return "fnearbyint"; in getOperationName()
DLegalizeFloatTypes.cpp99 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break; in SoftenFloatResult()
1199 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break; in ExpandFloatResult()
2222 case ISD::FNEARBYINT: in PromoteFloatResult()
2586 case ISD::FNEARBYINT: in SoftPromoteHalfResult()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp99 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
192 for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, in WebAssemblyTargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp269 setOperationAction(ISD::FNEARBYINT, MVT::f32, Custom); in AMDGPUTargetLowering()
270 setOperationAction(ISD::FNEARBYINT, MVT::f64, Custom); in AMDGPUTargetLowering()
422 setOperationAction(ISD::FNEARBYINT, VT, Expand); in AMDGPUTargetLowering()
525 case ISD::FNEARBYINT: in fnegFoldsIntoOp()
1139 case ISD::FNEARBYINT: return LowerFNEARBYINT(Op, DAG); in LowerOperation()
3808 case ISD::FNEARBYINT: // XXX - Should fround be handled? in performFNegCombine()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp252 setOperationAction(ISD::FNEARBYINT, MVT::f32, Custom); in AMDGPUTargetLowering()
253 setOperationAction(ISD::FNEARBYINT, MVT::f64, Custom); in AMDGPUTargetLowering()
423 setOperationAction(ISD::FNEARBYINT, VT, Expand); in AMDGPUTargetLowering()
716 case ISD::FNEARBYINT: return LowerFNEARBYINT(Op, DAG); in LowerOperation()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp320 setOperationAction(ISD::FNEARBYINT, MVT::f32, Custom); in AMDGPUTargetLowering()
321 setOperationAction(ISD::FNEARBYINT, MVT::f64, Custom); in AMDGPUTargetLowering()
488 setOperationAction(ISD::FNEARBYINT, VT, Expand); in AMDGPUTargetLowering()
595 case ISD::FNEARBYINT: in fnegFoldsIntoOp()
1245 case ISD::FNEARBYINT: return LowerFNEARBYINT(Op, DAG); in LowerOperation()
3795 case ISD::FNEARBYINT: // XXX - Should fround be handled? in performFNegCombine()
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp99 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
182 for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, in WebAssemblyTargetLowering()
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-fp-rounding.ll128 ; FNEARBYINT

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