Searched refs:HasSVELane (Results 1 – 2 of 2) sorted by relevance
| /external/vixl/test/aarch64/ |
| D | test-utils-aarch64.h | 214 inline bool HasSVELane(T reg, int lane) const { in HasSVELane() function
221 VIXL_ASSERT(HasSVELane(reg, lane)); in GetSVELane()
415 if (!core->HasSVELane(reg, lane)) { in EqualSVE()
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| D | test-assembler-sve-aarch64.cc | 4588 if (!core.HasSVELane(zd_1, lane)) break; in IntBinArithHelper()
6872 if (!core.HasSVELane(z26.VnB(), lane)) break; in TEST_SVE()
6879 if (!core.HasSVELane(z27.VnH(), lane)) break; in TEST_SVE()
6886 if (!core.HasSVELane(z28.VnS(), lane)) break; in TEST_SVE()
6893 if (!core.HasSVELane(z29.VnD(), lane)) break; in TEST_SVE()
12413 if (!core.HasSVELane(dn_result, lane)) break; in FPBinArithHelper()
12423 if (!core.HasSVELane(dm_result, lane)) break; in FPBinArithHelper()
12766 if (!core.HasSVELane(zd_asr, lane)) break; in BitwiseShiftImmHelper()
12783 if (!core.HasSVELane(zd_lsr, lane)) break; in BitwiseShiftImmHelper()
12791 if (!core.HasSVELane(zd_lsl, lane)) break; in BitwiseShiftImmHelper()
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