/external/llvm-project/llvm/unittests/CodeGen/ |
D | AArch64SelectionDAGTest.cpp | 127 auto IdxVT = EVT::getIntegerVT(Context, 64); in TEST_F() local 129 auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT); in TEST_F() 170 auto IdxVT = EVT::getIntegerVT(Context, 64); in TEST_F() local 172 auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT); in TEST_F() 187 auto IdxVT = EVT::getIntegerVT(Context, 64); in TEST_F() local 189 auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT); in TEST_F()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 329 EVT IdxVT = Tmp3.getValueType(); in PerformInsertVectorEltInMemory() local 345 Tmp3 = DAG.getNode(ISD::MUL, dl, IdxVT, Tmp3, in PerformInsertVectorEltInMemory() 346 DAG.getConstant(EltSize, dl, IdxVT)); in PerformInsertVectorEltInMemory() 347 SDValue StackPtr2 = DAG.getNode(ISD::ADD, dl, IdxVT, Tmp3, StackPtr); in PerformInsertVectorEltInMemory() 4294 EVT IdxVT = Idx.getValueType(); in PromoteNode() local 4296 SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SL, IdxVT); in PromoteNode() 4297 SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor); in PromoteNode() 4303 SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT); in PromoteNode() 4304 SDValue TmpIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset); in PromoteNode() 4342 EVT IdxVT = Idx.getValueType(); in PromoteNode() local [all …]
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D | FastISel.cpp | 327 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local 328 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 329 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN, in getRegForGEPIndex() 332 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex() 334 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN, IdxNIsKill); in getRegForGEPIndex()
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D | TargetLowering.cpp | 3217 EVT IdxVT = getVectorIdxTy(DAG.getDataLayout()); in scalarizeVectorStore() local 3225 DAG.getConstant(Idx, SL, IdxVT)); in scalarizeVectorStore()
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D | SelectionDAGBuilder.cpp | 3176 EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout()); in visitShuffleVector() local 3190 EltVT, Src, DAG.getConstant(Idx, dl, IdxVT)); in visitShuffleVector()
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D | DAGCombiner.cpp | 7289 EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout()); in visitTRUNCATE() local 7291 VecSrc, DAG.getConstant(0, SL, IdxVT)); in visitTRUNCATE()
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | FastISel.cpp | 531 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local 532 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 533 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN, in getRegForGEPIndex() 536 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex() 538 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN, IdxNIsKill); in getRegForGEPIndex()
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D | LegalizeDAG.cpp | 4815 EVT IdxVT = Idx.getValueType(); in PromoteNode() local 4817 SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SL, IdxVT); in PromoteNode() 4818 SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor); in PromoteNode() 4824 SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT); in PromoteNode() 4825 SDValue TmpIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset); in PromoteNode() 4862 EVT IdxVT = Idx.getValueType(); in PromoteNode() local 4865 SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SDLoc(), IdxVT); in PromoteNode() 4866 SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor); in PromoteNode() 4873 SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT); in PromoteNode() 4874 SDValue InEltIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset); in PromoteNode()
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D | TargetLowering.cpp | 7365 EVT IdxVT = Idx.getValueType(); in clampDynamicVectorIndex() local 7368 SDValue VS = DAG.getVScale(dl, IdxVT, in clampDynamicVectorIndex() 7369 APInt(IdxVT.getFixedSizeInBits(), in clampDynamicVectorIndex() 7371 SDValue Sub = DAG.getNode(ISD::SUB, dl, IdxVT, VS, in clampDynamicVectorIndex() 7372 DAG.getConstant(1, dl, IdxVT)); in clampDynamicVectorIndex() 7374 return DAG.getNode(ISD::UMIN, dl, IdxVT, Idx, Sub); in clampDynamicVectorIndex() 7377 APInt Imm = APInt::getLowBitsSet(IdxVT.getSizeInBits(), in clampDynamicVectorIndex() 7379 return DAG.getNode(ISD::AND, dl, IdxVT, Idx, in clampDynamicVectorIndex() 7380 DAG.getConstant(Imm, dl, IdxVT)); in clampDynamicVectorIndex() 7384 return DAG.getNode(ISD::UMIN, dl, IdxVT, Idx, in clampDynamicVectorIndex() [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | FastISel.cpp | 517 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local 518 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 519 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN, in getRegForGEPIndex() 522 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex() 524 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN, IdxNIsKill); in getRegForGEPIndex()
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D | LegalizeDAG.cpp | 4589 EVT IdxVT = Idx.getValueType(); in PromoteNode() local 4591 SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SL, IdxVT); in PromoteNode() 4592 SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor); in PromoteNode() 4598 SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT); in PromoteNode() 4599 SDValue TmpIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset); in PromoteNode() 4636 EVT IdxVT = Idx.getValueType(); in PromoteNode() local 4639 SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SDLoc(), IdxVT); in PromoteNode() 4640 SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor); in PromoteNode() 4647 SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT); in PromoteNode() 4648 SDValue InEltIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset); in PromoteNode()
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D | TargetLowering.cpp | 6615 EVT IdxVT = getVectorIdxTy(DAG.getDataLayout()); in scalarizeVectorStore() local 6632 DAG.getConstant(Idx, SL, IdxVT)); in scalarizeVectorStore() 6657 DAG.getConstant(Idx, SL, IdxVT)); in scalarizeVectorStore() 6990 EVT IdxVT = Idx.getValueType(); in clampDynamicVectorIndex() local 6993 APInt Imm = APInt::getLowBitsSet(IdxVT.getSizeInBits(), in clampDynamicVectorIndex() 6995 return DAG.getNode(ISD::AND, dl, IdxVT, Idx, in clampDynamicVectorIndex() 6996 DAG.getConstant(Imm, dl, IdxVT)); in clampDynamicVectorIndex() 6999 return DAG.getNode(ISD::UMIN, dl, IdxVT, Idx, in clampDynamicVectorIndex() 7000 DAG.getConstant(NElts - 1, dl, IdxVT)); in clampDynamicVectorIndex() 7019 EVT IdxVT = Index.getValueType(); in getVectorElementPointer() local [all …]
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D | SelectionDAGBuilder.cpp | 734 MVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout()); in getCopyToPartsVector() local 747 DAG.getConstant(i * IntermediateNumElts, DL, IdxVT)); in getCopyToPartsVector() 751 DAG.getConstant(i, DL, IdxVT)); in getCopyToPartsVector() 3757 EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout()); in visitShuffleVector() local 3769 EltVT, Src, DAG.getConstant(Idx, DL, IdxVT)); in visitShuffleVector()
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D | DAGCombiner.cpp | 10964 EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout()); in visitTRUNCATE() local 10967 DAG.getConstant(Idx, SL, IdxVT)); in visitTRUNCATE() 19652 MVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout()); in visitINSERT_SUBVECTOR() local 19659 NewIdx = DAG.getConstant(InsIdx * Scale, DL, IdxVT); in visitINSERT_SUBVECTOR() 19664 NewIdx = DAG.getConstant(InsIdx / Scale, DL, IdxVT); in visitINSERT_SUBVECTOR()
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/external/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 1076 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1078 defm rr: AVX512_maskable_3src_cast<opc, MRMSrcReg, _, IdxVT, (outs _.RC:$dst), 1081 (_.VT (X86VPermi2X IdxVT.RC:$src1, _.RC:$src2, _.RC:$src3))>, EVEX_4V, 1084 defm rm: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst), 1087 (_.VT (X86VPermi2X IdxVT.RC:$src1, _.RC:$src2, 1093 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1095 defm rmb: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst), 1099 (_.VT (X86VPermi2X IdxVT.RC:$src1, 1155 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1158 (ins IdxVT.RC:$src2, _.RC:$src3), [all …]
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 4828 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local 4829 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 4830 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*IsZExt=*/false); in getRegForGEPIndex() 4832 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 5000 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local 5001 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 5002 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*isZExt=*/false); in getRegForGEPIndex() 5004 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
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D | AArch64ISelLowering.cpp | 14081 EVT IdxVT = Index.getValueType(); in performMSCATTERCombine() local 14086 if ((IdxVT.getVectorElementType() == MVT::i8) || in performMSCATTERCombine() 14087 (IdxVT.getVectorElementType() == MVT::i16)) { in performMSCATTERCombine() 14088 EVT NewIdxVT = IdxVT.changeVectorElementType(MVT::i32); in performMSCATTERCombine()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 5007 EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); in getRegForGEPIndex() local 5008 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 5009 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*isZExt=*/false); in getRegForGEPIndex() 5011 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 1749 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1752 defm rr: AVX512_maskable_3src_cast<opc, MRMSrcReg, _, IdxVT, (outs _.RC:$dst), 1755 (_.VT (X86VPermt2 _.RC:$src2, IdxVT.RC:$src1, _.RC:$src3)), 1>, 1759 defm rm: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst), 1762 (_.VT (X86VPermt2 _.RC:$src2, IdxVT.RC:$src1, 1770 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1773 defm rmb: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst), 1778 IdxVT.RC:$src1,(_.VT (_.BroadcastLdFrag addr:$src3)))), 1>, 1837 X86VectorVTInfo IdxVT, 1841 … (IdxVT.VT (bitconvert (CastVT.VT _.RC:$src1))), _.RC:$src3), [all …]
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 1729 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1732 defm rr: AVX512_maskable_3src_cast<opc, MRMSrcReg, _, IdxVT, (outs _.RC:$dst), 1735 (_.VT (X86VPermt2 _.RC:$src2, IdxVT.RC:$src1, _.RC:$src3)), 1>, 1739 defm rm: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst), 1742 (_.VT (X86VPermt2 _.RC:$src2, IdxVT.RC:$src1, 1750 X86VectorVTInfo _, X86VectorVTInfo IdxVT> { 1753 defm rmb: AVX512_maskable_3src_cast<opc, MRMSrcMem, _, IdxVT, (outs _.RC:$dst), 1758 IdxVT.RC:$src1,(_.VT (_.BroadcastLdFrag addr:$src3)))), 1>, 1817 X86VectorVTInfo IdxVT, 1821 (IdxVT.VT (bitconvert [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 9347 EVT IdxVT = Idx.getValueType(); in performExtractVectorEltCombine() local 9350 SDValue IC = DAG.getConstant(I, SL, IdxVT); in performExtractVectorEltCombine() 9421 EVT IdxVT = Idx.getValueType(); in performInsertVectorEltCombine() local 9425 SDValue IC = DAG.getConstant(I, SL, IdxVT); in performInsertVectorEltCombine()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 10174 EVT IdxVT = Idx.getValueType(); in performInsertVectorEltCombine() local 10178 SDValue IC = DAG.getConstant(I, SL, IdxVT); in performInsertVectorEltCombine()
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