| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsTargetStreamer.h | 121 void emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, SMLoc IDLoc,
138 int16_t Imm1, int16_t Imm2, SMLoc IDLoc,
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsTargetStreamer.h | 122 void emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, SMLoc IDLoc,
139 int16_t Imm1, int16_t Imm2, SMLoc IDLoc,
|
| /external/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 198 void MipsTargetStreamer::emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, in emitII() argument
203 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitII()
247 int16_t Imm2, SMLoc IDLoc, in emitRRIII() argument
255 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitRRIII()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 195 void MipsTargetStreamer::emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, in emitII() argument
200 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitII()
244 int16_t Imm2, SMLoc IDLoc, in emitRRIII() argument
252 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitRRIII()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCMIPeephole.cpp | 1289 int16_t Imm1 = 0, NewImm1 = 0, Imm2 = 0, NewImm2 = 0; in eliminateRedundantCompare() local
1354 NewImm2 = Imm2 = (int16_t)CMPI2->getOperand(2).getImm(); in eliminateRedundantCompare()
1358 if (Imm1 != Imm2 && (!isEqOrNe(BI2) || !isEqOrNe(BI1))) { in eliminateRedundantCompare()
1359 int Diff = Imm1 - Imm2; in eliminateRedundantCompare()
1439 if (NewImm2 != Imm2) in eliminateRedundantCompare()
|
| D | PPCInstrInfo.cpp | 2223 static unsigned selectReg(int64_t Imm1, int64_t Imm2, unsigned CompareOpc, in selectReg() argument
2231 return Imm1 < Imm2 ? TrueReg : FalseReg; in selectReg()
2233 return Imm1 > Imm2 ? TrueReg : FalseReg; in selectReg()
2235 return Imm1 == Imm2 ? TrueReg : FalseReg; in selectReg()
2243 return (uint64_t)Imm1 < (uint64_t)Imm2 ? TrueReg : FalseReg; in selectReg()
2245 return (uint64_t)Imm1 > (uint64_t)Imm2 ? TrueReg : FalseReg; in selectReg()
2247 return Imm1 == Imm2 ? TrueReg : FalseReg; in selectReg()
|
| D | PPCISelDAGToDAG.cpp | 4380 unsigned Imm, Imm2, SH, MB, ME; in tryAndWithMask() local
4414 isInt32Immediate(N->getOperand(0).getOperand(1), Imm2)) { in tryAndWithMask()
4428 if (isRunOfOnes(~(Imm^Imm2), MB, ME) && !(~Imm & Imm2)) { in tryAndWithMask()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCMIPeephole.cpp | 1314 int16_t Imm1 = 0, NewImm1 = 0, Imm2 = 0, NewImm2 = 0; in eliminateRedundantCompare() local
1379 NewImm2 = Imm2 = (int16_t)CMPI2->getOperand(2).getImm(); in eliminateRedundantCompare()
1383 if (Imm1 != Imm2 && (!isEqOrNe(BI2) || !isEqOrNe(BI1))) { in eliminateRedundantCompare()
1384 int Diff = Imm1 - Imm2; in eliminateRedundantCompare()
1464 if (NewImm2 != Imm2) in eliminateRedundantCompare()
|
| D | PPCInstrInfo.cpp | 2663 static unsigned selectReg(int64_t Imm1, int64_t Imm2, unsigned CompareOpc, in selectReg() argument
2671 return Imm1 < Imm2 ? TrueReg : FalseReg; in selectReg()
2673 return Imm1 > Imm2 ? TrueReg : FalseReg; in selectReg()
2675 return Imm1 == Imm2 ? TrueReg : FalseReg; in selectReg()
2683 return (uint64_t)Imm1 < (uint64_t)Imm2 ? TrueReg : FalseReg; in selectReg()
2685 return (uint64_t)Imm1 > (uint64_t)Imm2 ? TrueReg : FalseReg; in selectReg()
2687 return Imm1 == Imm2 ? TrueReg : FalseReg; in selectReg()
|
| D | PPCISelDAGToDAG.cpp | 4479 unsigned Imm2; in tryAsSingleRLWIMI() local
4483 if (Val.getOpcode() != ISD::OR || !isInt32Immediate(Val.getOperand(1), Imm2)) in tryAsSingleRLWIMI()
4499 if (isRunOfOnes(~(Imm ^ Imm2), MB, ME) && !(~Imm & Imm2)) { in tryAsSingleRLWIMI()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonIntrinsics.td | 28 class T_II_pat <InstHexagon MI, Intrinsic IntID, PatFrag Imm1, PatFrag Imm2>
29 : Pat<(IntID Imm1:$Is, Imm2:$It),
30 (MI Imm1:$Is, Imm2:$It)>;
62 class T_QII_pat <InstHexagon MI, Intrinsic IntID, PatFrag Imm1, PatFrag Imm2>
63 : Pat <(IntID I32:$Rp, Imm1:$Is, Imm2:$It),
64 (MI (C2_tfrrp I32:$Rp), Imm1:$Is, Imm2:$It)>;
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsTargetStreamer.h | 105 void emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, SMLoc IDLoc,
|
| /external/llvm/include/llvm/CodeGen/ |
| D | FastISel.h | 424 bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | FastISel.h | 423 bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | FastISel.h | 424 bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 158 void MipsTargetStreamer::emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, in emitII() argument
163 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitII()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 1364 Register Imm2 = Add2Def->getOperand(2).getReg(); in matchPtrAddImmedChain() local
1365 auto MaybeImm2Val = getConstantVRegValWithLookThrough(Imm2, MRI); in matchPtrAddImmedChain()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 1913 uint64_t Imm2) { in fastEmitInst_rii() argument
1923 .addImm(Imm2); in fastEmitInst_rii()
1928 .addImm(Imm2); in fastEmitInst_rii()
|
| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 1518 Register Imm2 = Add2Def->getOperand(2).getReg(); in matchPtrAddImmedChain() local
1519 auto MaybeImm2Val = getConstantVRegValWithLookThrough(Imm2, MRI); in matchPtrAddImmedChain()
1568 Register Imm2 = Shl2Def->getOperand(2).getReg(); in matchShiftImmedChain() local
1569 auto MaybeImm2Val = getConstantVRegValWithLookThrough(Imm2, MRI); in matchShiftImmedChain()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 2212 uint64_t Imm2) { in fastEmitInst_rii() argument
2222 .addImm(Imm2); in fastEmitInst_rii()
2227 .addImm(Imm2); in fastEmitInst_rii()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 2147 uint64_t Imm2) { in fastEmitInst_rii() argument
2157 .addImm(Imm2); in fastEmitInst_rii()
2162 .addImm(Imm2); in fastEmitInst_rii()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2595 unsigned Imm, Imm2, SH, MB, ME; in Select() local
2652 isInt32Immediate(N->getOperand(0).getOperand(1), Imm2)) { in Select()
2666 if (isRunOfOnes(~(Imm^Imm2), MB, ME) && !(~Imm & Imm2)) { in Select()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonConstPropagation.cpp | 2604 bool Imm1 = Src1.isImm(), Imm2 = Src2.isImm(); in evaluateHexCompare2() local
2610 } else if (Imm2) { in evaluateHexCompare2()
2620 } else if (Imm2) { in evaluateHexCompare2()
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonConstPropagation.cpp | 2609 bool Imm1 = Src1.isImm(), Imm2 = Src2.isImm(); in evaluateHexCompare2() local
2615 } else if (Imm2) { in evaluateHexCompare2()
2625 } else if (Imm2) { in evaluateHexCompare2()
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 4451 int64_t Imm1, Imm2; in parseModImm() local
4550 Imm2 = CE->getValue(); in parseModImm()
4551 if (!(Imm2 & ~0x1E)) { in parseModImm()
4553 Operands.push_back(ARMOperand::CreateModImm(Imm1, Imm2, S, Ex2)); in parseModImm()
|