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Searched refs:Immed (Results 1 – 16 of 16) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCMIPeephole.cpp111 int Immed = MI.getOperand(3).getImm(); in simplifyCode() local
113 if (Immed != 1) { in simplifyCode()
152 else if ((Immed == 0 || Immed == 3) in simplifyCode()
158 MI.getOperand(3).setImm(3 - Immed); in simplifyCode()
164 else if (Immed == 2 && FeedImmed == 2 && FeedReg1 == FeedReg2) { in simplifyCode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCMIPeephole.cpp334 int Immed = MI.getOperand(3).getImm(); in simplifyCode() local
336 if (Immed == 1) in simplifyCode()
376 if ((Immed == 0 || Immed == 3) && in simplifyCode()
421 else if ((Immed == 0 || Immed == 3) && DefImmed == 2) { in simplifyCode()
426 MI.getOperand(3).setImm(3 - Immed); in simplifyCode()
432 else if (Immed == 2 && DefImmed == 2) { in simplifyCode()
441 } else if ((Immed == 0 || Immed == 3) && DefOpc == PPC::XXPERMDIs && in simplifyCode()
DPPCInstrInfo.cpp1755 int16_t Immed = (int16_t)Value; in optimizeCompareInstr() local
1759 if (Immed == -1 && PredCond == PPC::PRED_GT) in optimizeCompareInstr()
1763 else if (Immed == -1 && PredCond == PPC::PRED_LE) in optimizeCompareInstr()
1766 else if (Immed == 1 && PredCond == PPC::PRED_LT) in optimizeCompareInstr()
1769 else if (Immed == 1 && PredCond == PPC::PRED_GE) in optimizeCompareInstr()
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCMIPeephole.cpp495 int Immed = MI.getOperand(3).getImm(); in simplifyCode() local
497 if (Immed == 1) in simplifyCode()
537 if ((Immed == 0 || Immed == 3) && in simplifyCode()
582 else if ((Immed == 0 || Immed == 3) && DefImmed == 2) { in simplifyCode()
587 MI.getOperand(3).setImm(3 - Immed); in simplifyCode()
593 else if (Immed == 2 && DefImmed == 2) { in simplifyCode()
602 } else if ((Immed == 0 || Immed == 3) && DefOpc == PPC::XXPERMDIs && in simplifyCode()
DPPCInstrInfo.cpp2057 int16_t Immed = (int16_t)Value; in optimizeCompareInstr() local
2061 if (Immed == -1 && PredCond == PPC::PRED_GT) in optimizeCompareInstr()
2065 else if (Immed == -1 && PredCond == PPC::PRED_LE) in optimizeCompareInstr()
2068 else if (Immed == 1 && PredCond == PPC::PRED_LT) in optimizeCompareInstr()
2071 else if (Immed == 1 && PredCond == PPC::PRED_GE) in optimizeCompareInstr()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp174 ComplexRendererFns select12BitValueWithLeftShift(uint64_t Immed) const;
4141 uint64_t Immed; in getImmedFromMO() local
4143 Immed = Root.getImm(); in getImmedFromMO()
4145 Immed = Root.getCImm()->getZExtValue(); in getImmedFromMO()
4151 Immed = ValAndVReg->Value; in getImmedFromMO()
4154 return Immed; in getImmedFromMO()
4200 uint64_t Immed) const { in select12BitValueWithLeftShift()
4202 if (Immed >> 12 == 0) { in select12BitValueWithLeftShift()
4204 } else if ((Immed & 0xfff) == 0 && Immed >> 24 == 0) { in select12BitValueWithLeftShift()
4206 Immed = Immed >> 12; in select12BitValueWithLeftShift()
[all …]
DAArch64ISelDAGToDAG.cpp342 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectArithImmed() local
345 if (Immed >> 12 == 0) { in SelectArithImmed()
347 } else if ((Immed & 0xfff) == 0 && Immed >> 24 == 0) { in SelectArithImmed()
349 Immed = Immed >> 12; in SelectArithImmed()
355 Val = CurDAG->getTargetConstant(Immed, dl, MVT::i32); in SelectArithImmed()
373 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectNegArithImmed() local
378 if (Immed == 0) in SelectNegArithImmed()
382 Immed = ~((uint32_t)Immed) + 1; in SelectNegArithImmed()
384 Immed = ~Immed + 1ULL; in SelectNegArithImmed()
385 if (Immed & 0xFFFFFFFFFF000000ULL) in SelectNegArithImmed()
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DAArch64ISelLowering.cpp9441 bool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const { in isLegalAddImmediate()
9442 if (Immed == std::numeric_limits<int64_t>::min()) { in isLegalAddImmediate()
9443 LLVM_DEBUG(dbgs() << "Illegal add imm " << Immed in isLegalAddImmediate()
9448 Immed = std::abs(Immed); in isLegalAddImmediate()
9449 bool IsLegal = ((Immed >> 12) == 0 || in isLegalAddImmediate()
9450 ((Immed & 0xfff) == 0 && Immed >> 24 == 0)); in isLegalAddImmediate()
9451 LLVM_DEBUG(dbgs() << "Is " << Immed in isLegalAddImmediate()
9458 bool AArch64TargetLowering::isLegalICmpImmediate(int64_t Immed) const { in isLegalICmpImmediate()
9459 return isLegalAddImmediate(Immed); in isLegalICmpImmediate()
/external/llvm-project/llvm/lib/Target/AArch64/GISel/
DAArch64InstructionSelector.cpp289 ComplexRendererFns select12BitValueWithLeftShift(uint64_t Immed) const;
567 uint64_t Immed; in getImmedFromMO() local
569 Immed = Root.getImm(); in getImmedFromMO()
571 Immed = Root.getCImm()->getZExtValue(); in getImmedFromMO()
577 Immed = ValAndVReg->Value; in getImmedFromMO()
580 return Immed; in getImmedFromMO()
5046 uint64_t Immed) const { in select12BitValueWithLeftShift()
5048 if (Immed >> 12 == 0) { in select12BitValueWithLeftShift()
5050 } else if ((Immed & 0xfff) == 0 && Immed >> 24 == 0) { in select12BitValueWithLeftShift()
5052 Immed = Immed >> 12; in select12BitValueWithLeftShift()
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/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp263 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectArithImmed() local
266 if (Immed >> 12 == 0) { in SelectArithImmed()
268 } else if ((Immed & 0xfff) == 0 && Immed >> 24 == 0) { in SelectArithImmed()
270 Immed = Immed >> 12; in SelectArithImmed()
276 Val = CurDAG->getTargetConstant(Immed, dl, MVT::i32); in SelectArithImmed()
294 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectNegArithImmed() local
299 if (Immed == 0) in SelectNegArithImmed()
303 Immed = ~((uint32_t)Immed) + 1; in SelectNegArithImmed()
305 Immed = ~Immed + 1ULL; in SelectNegArithImmed()
306 if (Immed & 0xFFFFFFFFFF000000ULL) in SelectNegArithImmed()
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DAArch64ISelLowering.cpp7274 bool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const { in isLegalAddImmediate()
7276 if (Immed == std::numeric_limits<int64_t>::min()) in isLegalAddImmediate()
7279 Immed = std::abs(Immed); in isLegalAddImmediate()
7280 return ((Immed >> 12) == 0 || ((Immed & 0xfff) == 0 && Immed >> 24 == 0)); in isLegalAddImmediate()
7285 bool AArch64TargetLowering::isLegalICmpImmediate(int64_t Immed) const { in isLegalICmpImmediate()
7286 return isLegalAddImmediate(Immed); in isLegalICmpImmediate()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp402 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectArithImmed() local
405 if (Immed >> 12 == 0) { in SelectArithImmed()
407 } else if ((Immed & 0xfff) == 0 && Immed >> 24 == 0) { in SelectArithImmed()
409 Immed = Immed >> 12; in SelectArithImmed()
415 Val = CurDAG->getTargetConstant(Immed, dl, MVT::i32); in SelectArithImmed()
433 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectNegArithImmed() local
438 if (Immed == 0) in SelectNegArithImmed()
442 Immed = ~((uint32_t)Immed) + 1; in SelectNegArithImmed()
444 Immed = ~Immed + 1ULL; in SelectNegArithImmed()
445 if (Immed & 0xFFFFFFFFFF000000ULL) in SelectNegArithImmed()
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DAArch64ISelLowering.cpp11257 bool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const { in isLegalAddImmediate()
11258 if (Immed == std::numeric_limits<int64_t>::min()) { in isLegalAddImmediate()
11259 LLVM_DEBUG(dbgs() << "Illegal add imm " << Immed in isLegalAddImmediate()
11264 Immed = std::abs(Immed); in isLegalAddImmediate()
11265 bool IsLegal = ((Immed >> 12) == 0 || in isLegalAddImmediate()
11266 ((Immed & 0xfff) == 0 && Immed >> 24 == 0)); in isLegalAddImmediate()
11267 LLVM_DEBUG(dbgs() << "Is " << Immed in isLegalAddImmediate()
11274 bool AArch64TargetLowering::isLegalICmpImmediate(int64_t Immed) const { in isLegalICmpImmediate()
11275 return isLegalAddImmediate(Immed); in isLegalICmpImmediate()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp369 bool MSP430TargetLowering::isLegalICmpImmediate(int64_t Immed) const { in isLegalICmpImmediate()
371 return Immed >= -32 && Immed < 32; in isLegalICmpImmediate()
372 return TargetLowering::isLegalICmpImmediate(Immed); in isLegalICmpImmediate()
/external/llvm-project/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp368 bool MSP430TargetLowering::isLegalICmpImmediate(int64_t Immed) const { in isLegalICmpImmediate()
370 return Immed >= -32 && Immed < 32; in isLegalICmpImmediate()
371 return TargetLowering::isLegalICmpImmediate(Immed); in isLegalICmpImmediate()
/external/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.cpp1425 constexpr IValueT Immed = 0; in bl() local
1427 emitType05(Cond, Immed, Link); in bl()