| /external/llvm/lib/CodeGen/ |
| D | StackSlotColoring.cpp | 397 unsigned LoadReg = 0; in RemoveDeadStores() local
399 if (!(LoadReg = TII->isLoadFromStackSlot(*I, FirstSS))) in RemoveDeadStores()
403 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue; in RemoveDeadStores()
408 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | StackSlotColoring.cpp | 446 unsigned LoadReg = 0; in RemoveDeadStores() local
450 if (!(LoadReg = TII->isLoadFromStackSlot(*I, FirstSS, LoadSize))) in RemoveDeadStores()
460 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1 || in RemoveDeadStores()
467 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | StackSlotColoring.cpp | 447 unsigned LoadReg = 0; in RemoveDeadStores() local
451 if (!(LoadReg = TII->isLoadFromStackSlot(*I, FirstSS, LoadSize))) in RemoveDeadStores()
461 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1 || in RemoveDeadStores()
468 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.cpp | 206 Register LoadReg = MRI.createGenericVirtualRegister(LLT::scalar(32)); in assignValueToAddress() local
207 buildLoad(LoadReg, VA); in assignValueToAddress()
208 MIRBuilder.buildTrunc(ValVReg, LoadReg); in assignValueToAddress()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 2120 unsigned LoadReg = getRegForValue(LI); in tryToFoldLoad() local
2121 if (!LoadReg) in tryToFoldLoad()
2127 if (!MRI.hasOneUse(LoadReg)) in tryToFoldLoad()
2130 MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(LoadReg); in tryToFoldLoad()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 2417 Register LoadReg = getRegForValue(LI); in tryToFoldLoad() local
2418 if (!LoadReg) in tryToFoldLoad()
2424 if (!MRI.hasOneUse(LoadReg)) in tryToFoldLoad()
2427 MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(LoadReg); in tryToFoldLoad()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 2352 unsigned LoadReg = getRegForValue(LI); in tryToFoldLoad() local
2353 if (!LoadReg) in tryToFoldLoad()
2359 if (!MRI.hasOneUse(LoadReg)) in tryToFoldLoad()
2362 MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(LoadReg); in tryToFoldLoad()
|
| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 751 unsigned LoadReg; in handleConstantAddresses() local
753 LoadReg = I->second; in handleConstantAddresses()
777 LoadReg = createResultReg(RC); in handleConstantAddresses()
779 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), LoadReg); in handleConstantAddresses()
786 LocalValueMap[V] = LoadReg; in handleConstantAddresses()
791 AM.Base.Reg = LoadReg; in handleConstantAddresses()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 764 Register LoadReg; in handleConstantAddresses() local
766 LoadReg = I->second; in handleConstantAddresses()
790 LoadReg = createResultReg(RC); in handleConstantAddresses()
792 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), LoadReg); in handleConstantAddresses()
799 LocalValueMap[V] = LoadReg; in handleConstantAddresses()
804 AM.Base.Reg = LoadReg; in handleConstantAddresses()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 765 unsigned LoadReg; in handleConstantAddresses() local
767 LoadReg = I->second; in handleConstantAddresses()
791 LoadReg = createResultReg(RC); in handleConstantAddresses()
793 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), LoadReg); in handleConstantAddresses()
800 LocalValueMap[V] = LoadReg; in handleConstantAddresses()
805 AM.Base.Reg = LoadReg; in handleConstantAddresses()
|
| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 660 Register LoadReg; in applySextInRegOfLoad() local
662 std::tie(LoadReg, ScalarSizeBits) = MatchInfo; in applySextInRegOfLoad()
663 auto *LoadDef = MRI.getVRegDef(LoadReg); in applySextInRegOfLoad()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 4374 unsigned LoadReg = MI->getOperand(1).getReg(); in optimizeIntExtLoad() local
4375 LoadMI = MRI.getUniqueVRegDef(LoadReg); in optimizeIntExtLoad()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 4545 Register LoadReg = MI->getOperand(1).getReg(); in optimizeIntExtLoad() local
4546 LoadMI = MRI.getUniqueVRegDef(LoadReg); in optimizeIntExtLoad()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 4552 Register LoadReg = MI->getOperand(1).getReg(); in optimizeIntExtLoad() local
4553 LoadMI = MRI.getUniqueVRegDef(LoadReg); in optimizeIntExtLoad()
|