Searched refs:MC_SECURITY_CFG0_0 (Results 1 – 8 of 8) sorted by relevance
73 tegra_mc_write_32(MC_SECURITY_CFG0_0, phys_base_lo); in plat_memctrl_tzdram_setup()
138 mov x3, #MC_SECURITY_CFG0_0
104 #define MC_SECURITY_CFG0_0 U(0x70) macro
92 tegra_mc_write_32(MC_SECURITY_CFG0_0, phys_base); in tegra_memctrl_tzdram_setup()
240 #define MC_SECURITY_CFG0_0 U(0x70) macro
159 #define MC_SECURITY_CFG0_0 U(0x70) macro
96 #define MC_SECURITY_CFG0_0 U(0x70) macro
674 tegra_mc_write_32(MC_SECURITY_CFG0_0, (uint32_t)phys_base); in plat_memctrl_tzdram_setup()689 val |= tegra_mc_read_32(MC_SECURITY_CFG0_0) & MC_SECURITY_BOM_MASK; in plat_memctrl_tzdram_setup()