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Searched refs:MIPS16 (Results 1 – 25 of 32) sorted by relevance

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/external/llvm/test/CodeGen/Mips/
Dbswap.ll3 …le=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 | FileCheck %s -check-prefix=MIPS16
15 ; MIPS16-LABEL: bswap32:
16 ; MIPS16-DAG: srl $[[R0:[0-9]+]], $4, 8
17 ; MIPS16-DAG: srl $[[R1:[0-9]+]], $4, 24
18 ; MIPS16-DAG: sll $[[R2:[0-9]+]], $4, 8
19 ; MIPS16-DAG: sll $[[R3:[0-9]+]], $4, 24
20 ; MIPS16-DAG: li $[[R4:[0-9]+]], 65280
21 ; MIPS16-DAG: and $[[R4]], $[[R0]]
22 ; MIPS16-DAG: or $[[R1]], $[[R4]]
23 ; MIPS16-DAG: lw $[[R7:[0-9]+]], $CPI
[all …]
Dblockaddr.ll7 …pu=mips32 -mattr=+mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-MIPS16-1
8 …pu=mips32 -mattr=+mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-MIPS16-2
41 ; STATIC-MIPS16-1: .ent f
42 ; STATIC-MIPS16-2: .ent f
43 ; STATIC-MIPS16-1: li $[[R1_16:[0-9]+]], %hi($tmp[[TI_16:[0-9]+]])
44 ; STATIC-MIPS16-1: sll ${{[0-9]+}}, $[[R1_16]], 16
45 ; STATIC-MIPS16-2: li ${{[0-9]+}}, %lo($tmp{{[0-9]+}})
46 ; STATIC-MIPS16-1: jal dummy
47 ; STATIC-MIPS16-2: jal dummy
Delf_eflags.ll34 …s32r2 -mattr=+mips16 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s
79 ; 32R2 bit MIPS16 with PIC
80 ; CHECK-LE32R2-MIPS16: .abicalls
81 ; CHECK-LE32R2-MIPS16: .set mips16
Dinterrupt-attr-error.ll4 ; CHECK: LLVM ERROR: "interrupt" attribute is not supported on pre-MIPS32R2 or MIPS16 targets.
Dinsn-zero-size-bb.ll6 ; This only really matters for microMIPS and MIPS16.
Dmadd-msub.ll9 ; FIXME: The MIPS16 test should check its output
/external/llvm-project/llvm/test/CodeGen/Mips/
Dbswap.ll8 ; RUN: | FileCheck %s -check-prefix=MIPS16
24 ; MIPS16-LABEL: bswap32:
25 ; MIPS16-DAG: srl $[[R0:[0-9]+]], $4, 8
26 ; MIPS16-DAG: srl $[[R1:[0-9]+]], $4, 24
27 ; MIPS16-DAG: sll $[[R2:[0-9]+]], $4, 8
28 ; MIPS16-DAG: sll $[[R3:[0-9]+]], $4, 24
29 ; MIPS16-DAG: li $[[R4:[0-9]+]], 65280
30 ; MIPS16-DAG: and $[[R4]], $[[R0]]
31 ; MIPS16-DAG: or $[[R1]], $[[R4]]
32 ; MIPS16-DAG: lw $[[R7:[0-9]+]], $CPI
[all …]
Dblockaddr.ll14 ; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-MIPS16
55 ; STATIC-MIPS16: .ent f
56 ; STATIC-MIPS16: li $[[R0:[0-9]+]], %hi($tmp[[L0:[0-9]+]])
57 ; STATIC-MIPS16: sll $[[R1:[0-9]+]], $[[R0]], 16
58 ; STATIC-MIPS16: li $[[R2:[0-9]+]], %lo($tmp[[L0]])
59 ; STATIC-MIPS16: addu $[[R3:[0-9]+]], $[[R1]], $[[R2]]
60 ; STATIC-MIPS16: jal dummy
Dbrind-tailcall.ll18 ; RUN: -relocation-model=pic -mattr=+mips16 < %s 2>&1 | FileCheck --check-prefix=MIPS16 %s
20 ; RUN: -relocation-model=static -mattr=+mips16 < %s 2>&1 | FileCheck --check-prefix=MIPS16 %s
45 ; MIPS16: JrcRx16
58 ; MIPS16: RetRA16
Delf_eflags.ll33 …s32r2 -mattr=+mips16 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s
76 ; 32R2 bit MIPS16 with PIC
77 ; CHECK-LE32R2-MIPS16: .abicalls
78 ; CHECK-LE32R2-MIPS16: .set mips16
Dinterrupt-attr-error.ll4 ; CHECK: LLVM ERROR: "interrupt" attribute is not supported on pre-MIPS32R2 or MIPS16 targets.
Dinsn-zero-size-bb.ll6 ; This only really matters for microMIPS and MIPS16.
Ddins.ll6 ; RUN: | FileCheck %s -check-prefix=MIPS16
74 ; MIPS16-NOT: ins{{[[:space:]].*}}
/external/llvm/include/llvm/DebugInfo/CodeView/
DCodeView.h85 MIPS16 = 0x11, enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/
DCodeView.h88 MIPS16 = 0x11, enumerator
/external/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
DCodeView.h88 MIPS16 = 0x11, enumerator
/external/llvm-project/llvm/test/tools/llvm-readobj/ELF/
Dmips-abiflags.test255 # RUN: yaml2obj %s -DASES="DSP,DSPR2,EVA,MCU,MDMX,MIPS3D,MT,SMARTMIPS,VIRT,MSA,MIPS16,MICROMIPS,XPA…
259 …, DSPR2, Enhanced VA Scheme, MCU, MDMX, MIPS-3D, MT, SmartMIPS, VZ, MSA, MIPS16, microMIPS, XPA, C…
270 # FPABI-ASES-ALL-LLVM-NEXT: MIPS16 (0x400)
/external/llvm/lib/DebugInfo/CodeView/
DEnumTables.cpp167 CV_ENUM_CLASS_ENT(CPUType, MIPS16),
/external/llvm-project/llvm/lib/DebugInfo/CodeView/
DEnumTables.cpp154 CV_ENUM_CLASS_ENT(CPUType, MIPS16),
/external/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/CodeView/
DEnumTables.cpp146 CV_ENUM_CLASS_ENT(CPUType, MIPS16),
/external/llvm-project/llvm/lib/Target/Mips/
DMips16InstrInfo.td29 // This should be CPUSPReg but the MIPS16 subtarget isn't good enough at
33 // as we use an external assembler (which is already a requirement for MIPS16
1372 // MIPS16's behaviour.
/external/llvm/lib/Target/Mips/
DMips16InstrInfo.td30 // This should be CPUSPReg but the MIPS16 subtarget isn't good enough at
34 // as we use an external assembler (which is already a requirement for MIPS16
1369 // MIPS16's behaviour.
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16InstrInfo.td29 // This should be CPUSPReg but the MIPS16 subtarget isn't good enough at
33 // as we use an external assembler (which is already a requirement for MIPS16
1372 // MIPS16's behaviour.
/external/llvm/lib/ObjectYAML/
DELFYAML.cpp617 BCase(MIPS16) in bitset()
/external/llvm-project/llvm/docs/
DAtomics.rst566 on function-call boundaries. For example, MIPS supports the MIPS16 ISA, which
568 has the Thumb ISA. In MIPS16 and earlier versions of Thumb, the atomic

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