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Searched refs:MM3 (Results 1 – 25 of 35) sorted by relevance

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/external/mesa3d/src/mesa/x86/
D3dnow_xform3.S85 MOVQ ( MM0, MM3 ) /* x0 | x0 */
97 PFMUL ( REGOFF(8, ECX), MM3 ) /* x0*m3 | x0*m2 */
103 PFADD ( MM3, MM4 ) /* x0*m3+x1*m7 | x0*m2+x1*m6 */
157 MOVD ( REGOFF(56, ECX), MM3 ) /* | m32 */
182 PFADD ( MM3, MM6 ) /* | x2*m22+m32 */
251 MOVQ ( MM0, MM3 ) /* x1 | x0 */
254 PUNPCKHDQ ( MM3, MM3 ) /* x1 | x1 */
257 PFMUL ( REGOFF(16, ECX), MM3 ) /* x1*m5 | x1*m4 */
260 PFADD ( MM2, MM3 ) /* x0*m1+x1*m5 | x0*m0+x1*m4 */
263 PFADD ( REGOFF(48, ECX), MM3 ) /* x0*m1+...+m11 | x0*m0+x1*m4+m12 */
[all …]
D3dnow_xform4.S86 MOVQ ( MM2, MM3 ) /* x1 | x1 */
94 PFMUL ( REGOFF(24, ECX), MM3 ) /* x1*m7 | x1*m6 */
104 PFADD ( MM1, MM3 )
112 PFADD ( MM3, MM7 )
175 MOVD ( REGOFF(8, EAX), MM3 ) /* | x2 */
187 PFSUBR ( MM7, MM3 ) /* | -x2 */
192 PFACC ( MM3, MM6 ) /* -x2 | x2*m22+x3*m32 */
249 MOVQ ( REGOFF(8, EAX), MM3 ) /* x3 | x2 */
252 MOVQ ( MM3, MM4 ) /* x3 | x2 */
261 PUNPCKLDQ ( MM3, MM3 ) /* x2 | x2 */
[all …]
Dmmx_blend.S277 GMB_ALPHA( MM1, MM3, MM4, MM6 ) ;\
278 GMB_LERP_GSC( MM1, MM2, MM3, MM4, MM5, MM6 ) ;\
279 GMB_PACK( MM3, MM6 ) ;\
280 GMB_STORE( rgba, MM3 )
327 MOVQ ( MM1, MM3 ) ;\
329 PXOR ( MM7, MM3 ) /* unsigned -> signed */ ;\
331 PCMPGTB ( MM3, MM4 ) /* q > p ? 0xff : 0x00 */ ;\
359 MOVQ ( MM1, MM3 ) ;\
361 PXOR ( MM7, MM3 ) /* unsigned -> signed */ ;\
363 PCMPGTB ( MM3, MM4 ) /* q > p ? 0xff : 0x00 */ ;\
D3dnow_xform1.S67 MOVQ ( REGOFF(56, ECX), MM3 ) /* m33 | m32 */
81 PFADD ( MM3, MM5 ) /* x0*m03+m33 | x0*m02+m32 */
179 MOVD ( REGOFF(56, ECX), MM3 ) /* | m32 */
190 MOVD ( MM3, REGOFF(8, EDX) ) /* write r2 */
235 MOVD ( REGOFF(56, ECX), MM3 ) /* | m32 */
244 MOVQ ( MM3, REGOFF(8, EDX) ) /* write r2 (=m32), r3 (=0) */
402 MOVD ( REGOFF(56, ECX), MM3 ) /* | m32 */
416 PFADD ( MM3, MM5 ) /* | x0*m02+m32 */
D3dnow_xform2.S72 MOVD ( REGOFF(12, ECX), MM3 ) /* | m03 */
73 PUNPCKLDQ ( REGOFF(28, ECX), MM3 ) /* m13 | m03 */
96 PFMUL ( MM3, MM7 ) /* x1*m13 | x0*m03 */
147 MOVD ( REGOFF(56, ECX), MM3 ) /* | m32 */
156 MOVQ ( MM3, REGOFF(8, EDX) ) /* write r2 (=m32), r3 (=0) */
281 MOVD ( REGOFF(56, ECX), MM3 ) /* | m32 */
292 MOVD ( MM3, REGOFF(8, EDX) ) /* write r2 */
/external/llvm/test/CodeGen/X86/
Dipra-reg-usage.ll6 …4 DR15 FP0 FP1 FP2 FP3 FP4 FP5 FP6 FP7 K0 K1 K2 K3 K4 K5 K6 K7 MM0 MM1 MM2 MM3 MM4 MM5 MM6 MM7 R11…
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86Instr3DNow.td77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
DX86InstrMMX.td155 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
DX86RegisterInfo.td195 def MM3 : X86Reg<"mm3", 3>, DwarfRegNum<[44, 32, 32]>;
/external/llvm-project/llvm/lib/Target/X86/
DX86Instr3DNow.td77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
DX86InstrMMX.td152 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h212 ENTRY(MM3) \
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h210 ENTRY(MM3) \
/external/llvm-project/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h209 ENTRY(MM3) \
/external/capstone/arch/X86/
DX86DisassemblerDecoder.h220 ENTRY(MM3) \
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp128 {codeview::RegisterId::MM3, X86::MM3}, in initLLVMToSEHAndCVRegMapping()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp126 {codeview::RegisterId::MM3, X86::MM3}, in initLLVMToSEHAndCVRegMapping()
/external/ImageMagick/PerlMagick/t/reference/write/composite/
DCopyBlue.miff41 …�MM<�MM@�MM?�MM=�MM<�MM<�MM1�MM/�MM,�MM.�MM/�MM0�MM3�MM4�MM1�MM-�MM-�MM-�MM.�MM0�MM-�MM'�MM�MM4�M…
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenRegisterInfo.inc142 MM3 = 122,
1242 { X86::MM3 },
2106 X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7,
2759 { 44U, X86::MM3 },
2820 { 32U, X86::MM3 },
2865 { 32U, X86::MM3 },
2926 { 44U, X86::MM3 },
2987 { 32U, X86::MM3 },
3032 { 32U, X86::MM3 },
3078 { X86::MM3, 44U },
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def145 CV_REGISTER(MM3, 149)
/external/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def146 CV_REGISTER(MM3, 149)
/external/llvm/docs/TableGen/
Dindex.rst65 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
DLangIntro.rst543 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/external/llvm-project/llvm/docs/TableGen/
Dindex.rst68 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td155 def MM3 : X86Reg<"mm3", 3>, DwarfRegNum<[44, 32, 32]>;

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