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/external/mesa3d/src/gallium/tests/graw/geometry-shader/
Dmulti-line.txt11 MOV TEMP[0], IN[0][0]
14 MOV OUT[0], TEMP[0]
15 MOV OUT[1], IN[0][1]
17 MOV OUT[0], IN[2][0]
18 MOV OUT[1], IN[0][1]
20 MOV OUT[0], IN[0][0]
21 MOV OUT[1], IN[2][1]
23 MOV OUT[0], TEMP[0]
24 MOV OUT[1], IN[0][1]
28 MOV OUT[0], TEMP[0]
[all …]
Dline.txt10 MOV OUT[0], IN[0][0]
11 MOV OUT[1], IN[0][1]
14 MOV OUT[0], IN[1][0]
15 MOV OUT[1], IN[0][1]
18 MOV OUT[0], IN[2][0]
19 MOV OUT[1], IN[2][1]
22 MOV OUT[0], IN[0][0]
23 MOV OUT[1], IN[0][1]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dstore-private.ll8 ; EG: MOV {{[\* ]*}}{{T[0-9]+\.[XYZW]}}, T(0 + AR.x).X+,
10 ; EG: MOV {{[\* ]*}}T(0 + AR.x).X+,
13 ; CM: MOV {{[\* ]*}}{{T[0-9]+\.[XYZW]}}, T(0 + AR.x).X+,
15 ; CM: MOV {{[\* ]*}}T(0 + AR.x).X+,
29 ; EG: MOV [[OLD:T[0-9]\.[XYZW]]], {{.*}}AR.x
45 ; EG: MOV * T(0 + AR.x).X+, [[RES]]
60 ; EG: MOV [[OLD:T[0-9]\.[XYZW]]], {{.*}}AR.x
74 ; EG: MOV * T(0 + AR.x).X+, [[RES]]
89 ; EG: MOV {{[\* ]*}}{{T[0-9]+\.[XYZW]}}, T(0 + AR.x).X+,
91 ; EG: MOV {{[\* ]*}}T(0 + AR.x).X+,
[all …]
/external/libxaac/decoder/armv7/
Dixheaacd_autocorr_st2.s46 MOV r4, r4, ASR #3
47 MOV r5, r5, ASR #3
48 MOV r6, r6, ASR #3
49 MOV r7, r7, ASR #3
73 MOV r10, r1
75 MOV r4 , r6
76 MOV r5 , r7
85 MOV r6, r6, ASR #3
86 MOV r7, r7, ASR #3
99 MOV r4, r4, ASR #3
[all …]
Dixheaacd_tns_ar_filter_fixed_32x16.s40 MOV r8, #0
61 MOV r7, r4
66 MOV r8, r8, lsl r1
67 MOV r9, r8, asr r1
68 MOV r8 , r8 , lsl r6
76 MOV r5 , r5 , lsl #1
77 MOV r11 , #0
86 MOV r8, r8, lsl r1
88 MOV r9, r8, asr r1
91 MOV r8 , r8 , lsl r6
[all …]
Dixheaacd_sbr_qmfsyn64_winadd.s34 MOV R7, #0x8000
36 MOV R12, R2
42 MOV R10, R0
43 MOV R11, R2
49 MOV R6, #64
50 MOV R6, R6, LSL #1
52 MOV R7, #128
53 MOV R9, R7, LSL #1
55 MOV R6, #16
56 MOV R7, #128
[all …]
Dixheaacd_auto_corr.s33 MOV r12, r0
35 MOV r5, #9728
43 MOV r4, r4, ASR #3
44 MOV r3, r3, ASR #3
45 MOV r6, r6, ASR #3
46 MOV r5, r5, ASR #3
58 MOV r3, #12
62 MOV r7, #0
63 MOV r8, #0
64 MOV r9, #0
[all …]
Dixheaacd_enery_calc_per_subband.s30 MOV R4, R2
31 MOV R5, R3
32 MOV R2, R0
33 MOV R3, R1
39 MOV R1, R1, LSL #1
58 MOV R10, #20
67 MOV R2, R2, LSL #1
68 MOV R10, #21
75 MOV R6, #0
76 MOV R8, R0
[all …]
Dixheaacd_tns_parcor2lpc_32x16.s28 MOV R4, SP
29 MOV R8, #0
30 MOV R5, #0x8000
33 MOV R6, #0
34 MOV R7, #16
42 MOV R9, #0x7FFFFFFF
43 MOV R10, R9, ASR R8
46 MOV R7, R3
48 MOV R11, R10
51 MOV R12, R3
[all …]
Dixheaacd_decorr_filter2.s36 MOV r11, #384
63 MOV r0, #128
132 MOV r9, #20
156 MOV r8, #0x8000
165 MOV r7, r9, asr #15
166 MOV r8, r3, asr #15
172 MOV r14, r14, asr #16
173 MOV r1, r1, asr #16
190 MOV r3, r3, asr #15
195 MOV r9, r9, asr #15
[all …]
Dixheaacd_conv_ergtoamplitudelp.s37 MOV R12, #0
38 MOV R14, #-16
46 MOV R6, R6, LSL R8
47 MOV R6, R6, ASR #5
54 MOV R14, R7, ASR #1
62 MOV R8, #0
63 MOV R9, #-16
72 MOV R6, R6, LSL R8
73 MOV R6, R6, ASR #5
80 MOV R9, R7, ASR #1
[all …]
Dixheaacd_esbr_qmfsyn64_winadd.s24 MOV R7, #0
26 MOV R12, R2
31 MOV R10, R0
32 MOV R11, R2
36 MOV R6, #64
37 MOV R6, R6, LSL #2
39 MOV R7, #256
40 MOV R9, R7, LSL #1
42 MOV R6, #64
43 MOV R7, #256
[all …]
Dixheaacd_fwd_modulation.s31 MOV r5, r2
33 MOV lr, r1
34 MOV r4, r1
35 MOV r1, #0x1f
36 MOV r7, r5
38 MOV r6, r3
43 MOV r3, r3, ASR #4
44 MOV r12, r12, ASR #4
55 MOV r1, r6
56 MOV r0, r4
[all …]
Dixheaacd_conv_ergtoamplitude.s38 MOV R12, #0
39 MOV R9, #-16
45 MOV R11, R6, LSL R8
47 MOV R11, R11, ASR #5
58 MOV R9, R7, ASR #1
66 MOV R8, #0
67 MOV R9, #-16
73 MOV R11, R6, LSL R8
74 MOV R11, R11, ASR #5
85 MOV R9, R7, ASR #1
[all …]
Dixheaacd_sbr_qmfanal32_winadds.s35 MOV R9, R7, LSL #1
38 MOV r10, #3
70 MOV R5, #8
72 MOV R6, #64
74 MOV R6, R6, LSL #1
76 MOV R7, #244
78 MOV R9, R0
81 MOV R11, R4
88 MOV R10, R2
113 MOV R0, R9
[all …]
Dixheaacd_tns_ar_filter_fixed.s40 MOV r8, #0
58 MOV r7, r4 @loop_count
63 MOV r8, r8, lsl r1
64 MOV r9, r8, asr r1
65 MOV r8 , r8 , lsl r6
72 MOV r5 , r5 , lsl #2
73 MOV r11 , #0 @accu = 0
80 MOV r2, #0
85 MOV r8, r8, lsl r1
87 MOV r9, r8, asr r1
[all …]
Dixheaacd_rescale_subbandsamples.s56 MOV R7, R3
63 MOV R11, R11, LSL R4
82 MOV R7, R3
88 MOV R11, R11, ASR R4
119 MOV R11, R11, LSL R4
120 MOV R1, R1, LSL R4
126 MOV R11, R11, LSL R4
127 MOV R1, R1, LSL R4
140 MOV R11, R11, LSL R4
141 MOV R1, R1, LSL R4
[all …]
Dixheaacd_sbr_qmfanal32_winadds_eld.s14 MOV R9, R7, LSL #1
17 MOV r10, #3
49 MOV R5, #8
52 MOV R6, #64
53 MOV R6, R6, LSL #1 @
56 MOV R7, #244 @ NOT USED further
58 MOV R9, R0
61 MOV R11, R4 @ Mov winAdd to R11
66 MOV R10, R2 @
92 MOV R0, R9
[all …]
/external/libxaac/decoder/armv8/
Dixheaacd_post_twiddle_overlap.s61 MOV x16, x5
62 MOV x17, x7
68 MOV w8, #7500
81 MOV w25, w5
83 MOV x8, #1
86 MOV w26, w8
126 MOV x9, #50
127 MOV x12, #-50
141 MOV w11, w16
170 MOV v1.s[0], w26
[all …]
Dixheaacd_sbr_qmfsyn64_winadd.s40 MOV X16, \reg1
41 MOV \reg1, \reg2
42 MOV \reg2, x16
53 MOV w7, #0x8000
55 MOV x12, x2
61 MOV x10, x0
62 MOV x11, x2
68 MOV x6, #64
71 MOV x7, #128
74 MOV x6, #16
[all …]
Dixheaacd_calcmaxspectralline.s28 MOV w11, #0x00000000
29 MOV V3.S[0], w11
30 MOV V3.S[1], w11
31 MOV V3.S[2], w11
32 MOV V3.S[3], w11
50 MOV W4, V3.S[0]
51 MOV W1, V3.S[1]
52 MOV W2, V3.S[2]
54 MOV W3, V3.S[3]
71 MOV W0, W4
Dixheaacd_sbr_qmf_analysis32_neon.s46 MOV x20, x4
48 MOV w10, #3
141 MOV x4, x20
142 MOV x5, #8
144 MOV x6, #64
148 MOV x7, #244
150 MOV x9, x0
153 MOV x11, x4
160 MOV x10, x2
185 MOV x0, x9
[all …]
/external/llvm-project/llvm/test/TableGen/GICombinerEmitter/
Dparse-match-pattern.td23 def MOV : I<(outs GPR32:$dst), (ins GPR32:$src1), []>;
28 (match (MOV $d, $s)),
36 // CHECK-NEXT: (MOV 0:dst<def>, 1:src1):$__anon0_0 // $d=getOperand(0), $s=getOperand(1)
37 // CHECK-NEXT: <<$mi.getOpcode() == MOV>>:$__anonpred0_1
45 …-fA-F]+]] [shape=record,label="{{[{]{}}<s0>#0 $dst|<s1>#1 $src1}|__anon0_0|MOV|Match starts here|$…
46 …cord,label="{{[{]{}}<s0>#0 $$|<s1>#1 $mi}|__anonpred0_1|$mi.getOpcode() == MOV|{{(0x)?[0-9a-fA-F]+…
52 (match (MOV $t, $s),
53 (MOV $d, $t)),
59 // CHECK-NEXT: (MOV 0:dst<def>, 1:src1):$__anon1_0 // $t=getOperand(0), $s=getOperand(1)
60 // CHECK-NEXT: (MOV 0:dst<def>, 1:src1):$__anon1_2 // $d=getOperand(0), $t=getOperand(1)
[all …]
/external/libhevc/common/arm64/
Dihevc_sao_edge_offset_class3.s77 MOV x19,x0 //Store pu1_src in sp
78 MOV x21,x6 //Store pu1_src_left in sp
79 MOV x22,x3 //Store pu1_src_top in sp
80 MOV x23,x7 //Store pu1_avail in sp
81 MOV x24,x4 //Store pu1_src_top_left in sp
82 MOV x20,x5 //Store pu1_src_top_right in sp
83 MOV x13,x6 //Store pu1_src_bot_left in sp
85 MOV x5,x7 //Loads pu1_avail
91 MOV x16,x7 // wd
92 MOV x17,x8 // ht
[all …]
Dihevc_sao_edge_offset_class2.s73 MOV x5,x7 //Loads pu1_avail
79 MOV x16,x7 // wd
80 MOV x17,x8 // ht
91 MOV x19,x0 //Store pu1_src in sp
92 MOV x21,x2 //Store pu1_src_left in sp
93 MOV x22,x3 //Store pu1_src_top in sp
94 MOV x23,x5 //Store pu1_avail in sp
95 MOV x24,x4 //Store pu1_src_top_left in sp
98 MOV x9,x7 //Move width to x9 for loop count
127 MOV x20,#1
[all …]

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