Searched refs:MP0_DCM_CFG7 (Results 1 – 2 of 2) sorted by relevance
178 ret &= ((mmio_read_32(MP0_DCM_CFG7) & in dcm_mp_cpusys_top_core_stall_dcm_is_on()189 mmio_clrsetbits_32(MP0_DCM_CFG7, in dcm_mp_cpusys_top_core_stall_dcm()194 mmio_clrsetbits_32(MP0_DCM_CFG7, in dcm_mp_cpusys_top_core_stall_dcm()388 ret &= ((mmio_read_32(MP0_DCM_CFG7) & in dcm_mp_cpusys_top_fcm_stall_dcm_is_on()399 mmio_clrsetbits_32(MP0_DCM_CFG7, in dcm_mp_cpusys_top_fcm_stall_dcm()404 mmio_clrsetbits_32(MP0_DCM_CFG7, in dcm_mp_cpusys_top_fcm_stall_dcm()
33 #define MP0_DCM_CFG7 (MP_CPUSYS_TOP_BASE + 0x489c) macro