| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 747 MGATHER, MSCATTER, enumerator
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| D | SelectionDAGNodes.h | 1118 N->getOpcode() == ISD::MSCATTER ||
1950 N->getOpcode() == ISD::MSCATTER;
1976 : MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO) {}
1979 return N->getOpcode() == ISD::MSCATTER;
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 903 MGATHER, MSCATTER, enumerator
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| D | SelectionDAGNodes.h | 1419 N->getOpcode() == ISD::MSCATTER ||
2428 N->getOpcode() == ISD::MSCATTER;
2460 : MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO,
2466 return N->getOpcode() == ISD::MSCATTER;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 695 MGATHER, MSCATTER, enumerator
1643 N->getOpcode() == X86ISD::MSCATTER; in classof()
1665 : X86MaskedGatherScatterSDNode(X86ISD::MSCATTER, Order, dl, VTs, MemVT, in X86MaskedScatterSDNode()
1671 return N->getOpcode() == X86ISD::MSCATTER; in classof()
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| D | X86InstrFragmentsSIMD.td | 906 def X86masked_scatter : SDNode<"X86ISD::MSCATTER",
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1090 MSCATTER, enumerator
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| D | SelectionDAGNodes.h | 1344 case ISD::MSCATTER:
1379 N->getOpcode() == ISD::MSCATTER ||
2443 N->getOpcode() == ISD::MSCATTER;
2481 : MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO,
2494 return N->getOpcode() == ISD::MSCATTER;
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 830 MSCATTER, enumerator
1678 N->getOpcode() == X86ISD::MSCATTER; in classof()
1696 return N->getOpcode() == X86ISD::MSCATTER; in classof()
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| D | X86ISelLowering.cpp | 1700 setOperationAction(ISD::MSCATTER, VT, Custom); in X86TargetLowering()
1780 setOperationAction(ISD::MSCATTER, MVT::v2f32, Custom); in X86TargetLowering()
1781 setOperationAction(ISD::MSCATTER, MVT::v2i32, Custom); in X86TargetLowering()
1785 setOperationAction(ISD::MSCATTER, VT, Custom); in X86TargetLowering()
2013 setTargetDAGCombine(ISD::MSCATTER); in X86TargetLowering()
25765 DAG.getMemIntrinsicNode(X86ISD::MSCATTER, dl, VTs, Ops, in getScatterNode()
29437 return DAG.getMemIntrinsicNode(X86ISD::MSCATTER, dl, VTs, Ops, in LowerMSCATTER()
29470 return DAG.getMemIntrinsicNode(X86ISD::MSCATTER, dl, VTs, Ops, in LowerMSCATTER()
29843 case ISD::MSCATTER: return LowerMSCATTER(Op, Subtarget, DAG); in LowerOperation()
31086 NODE_NAME_CASE(MSCATTER) in getTargetNodeName()
[all …]
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| D | X86ISelDAGToDAG.cpp | 5726 case X86ISD::MSCATTER: { in Select()
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| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | sve-masked-scatter-legalise.ll | 3 ; Tests that exercise various type legalisation scenarios for ISD::MSCATTER.
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 248 } else if (Op.getOpcode() == ISD::MSCATTER || Op.getOpcode() == ISD::MSTORE) in LegalizeOp()
344 case ISD::MSCATTER: in LegalizeOp()
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| D | SelectionDAGDumper.cpp | 297 case ISD::MSCATTER: return "masked_scatter"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 1475 case ISD::MSCATTER: in SplitVectorOperand()
3086 case ISD::MSCATTER: Res = WidenVecOp_MSCATTER(N, OpNo); break; in WidenVectorOperand()
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| D | LegalizeIntegerTypes.cpp | 910 case ISD::MSCATTER: Res = PromoteIntOp_MSCATTER(cast<MaskedScatterSDNode>(N), in PromoteIntegerOperand()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 373 case ISD::MSCATTER: return "masked_scatter"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 1942 case ISD::MSCATTER: in SplitVectorOperand()
4196 case ISD::MSCATTER: Res = WidenVecOp_MSCATTER(N, OpNo); break; in WidenVectorOperand()
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| D | SelectionDAG.cpp | 597 case ISD::MSCATTER: { in AddNodeIDCustom()
7209 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops); in getMaskedScatter()
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| D | LegalizeIntegerTypes.cpp | 1281 case ISD::MSCATTER: Res = PromoteIntOp_MSCATTER(cast<MaskedScatterSDNode>(N), in PromoteIntegerOperand()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 385 case ISD::MSCATTER: return "masked_scatter"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 2079 case ISD::MSCATTER: in SplitVectorOperand()
4360 case ISD::MSCATTER: Res = WidenVecOp_MSCATTER(N, OpNo); break; in WidenVectorOperand()
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| D | SelectionDAG.cpp | 648 case ISD::MSCATTER: { in AddNodeIDCustom()
7350 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops); in getMaskedScatter()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 529 def masked_scatter : SDNode<"ISD::MSCATTER", SDTMaskedScatter,
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 852 setTargetDAGCombine(ISD::MSCATTER); in AArch64TargetLowering()
1074 setOperationAction(ISD::MSCATTER, VT, Custom); in AArch64TargetLowering()
1127 setOperationAction(ISD::MSCATTER, VT, Custom); in AArch64TargetLowering()
1152 setOperationAction(ISD::MSCATTER, VT, Custom); in AArch64TargetLowering()
4278 case ISD::MSCATTER: in LowerOperation()
15299 case ISD::MSCATTER: in PerformDAGCombine()
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