| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_32.c | 381 FAIL_IF(push_inst(compiler, MUH | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
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| D | sljitNativeMIPS_64.c | 477 …FAIL_IF(push_inst(compiler, SELECT_OP(DMUH, MUH) | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)… in emit_single_op()
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| D | sljitNativeMIPS_common.c | 221 #define MUH (HI(0) | (3 << 6) | LO(24)) macro
1244 …FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? MUHU : MUH) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP… in sljit_emit_op0()
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 824 def MUH : R6MMR6Rel, MUH_ENC, MUH_DESC, ISA_MIPS32R6;
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 944 def MUH : R6MMR6Rel, MUH_ENC, MUH_DESC, ISA_MIPS32R6;
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| D | MipsScheduleGeneric.td | 197 def : InstRW<[GenericWriteMul], (instrs MUH, MUHU, MULU, MUL_R6)>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 944 def MUH : R6MMR6Rel, MUH_ENC, MUH_DESC, ISA_MIPS32R6;
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| D | MipsScheduleGeneric.td | 197 def : InstRW<[GenericWriteMul], (instrs MUH, MUHU, MULU, MUL_R6)>;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 1121 {DBGFIELD("MUH") 1, false, false, 12, 2, 4, 1, 0, 0}, // #861
2805 {DBGFIELD("MUH") 16383, false, false, 0, 0, 0, 0, 0, 0}, // #861
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| D | MipsGenMCCodeEmitter.inc | 2105 UINT64_C(216), // MUH
5040 case Mips::MUH:
11567 CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // MUH = 2092
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| D | MipsGenAsmWriter.inc | 3333 268457788U, // MUH
6087 0U, // MUH
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| D | MipsGenInstrInfo.inc | 2107 MUH = 2092,
3641 MUH = 861,
6953 …2092, 3, 1, 4, 861, 0, 0x6ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #2092 = MUH
16644 { Mips::MUH, Mips::MUH, Mips::MUH_MMR6 },
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| D | MipsGenFastISel.inc | 1790 return fastEmitInst_rr(Mips::MUH, &Mips::GPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
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| D | MipsGenDisassemblerTables.inc | 6283 /* 236 */ MCD::OPC_Decode, 172, 16, 50, // Opcode: MUH
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| D | MipsGenAsmMatcher.inc | 7210 …{ 6829 /* muh */, Mips::MUH, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_HasStd…
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| D | MipsGenGlobalISel.inc | 21480 …// (mulhs:{ *:[i32] } GPR32Opnd:{ *:[i32] }:$rs, GPR32Opnd:{ *:[i32] }:$rt) => (MUH:{ *:[i32] } …
21481 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::MUH,
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| D | MipsGenDAGISel.inc | 26027 /* 49275*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::MUH), 0,
26030 // Dst: (MUH:{ *:[i32] } GPR32Opnd:{ *:[i32] }:$rs, GPR32Opnd:{ *:[i32] }:$rt)
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 1232 134239672U, // MUH
3021 0U, // MUH
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| D | MipsGenDisassemblerTables.inc | 3872 /* 203 */ MCD_OPC_Decode, 191, 9, 35, // Opcode: MUH
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| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart1.csv | 9864 ,"CA","MUH","Murray Harbour","Murray Harbour","PE","--3-----","RL","0207",,"4600N 06231W",
11855 ,"CH","MUH","Muhen","Muhen","AG","-23-----","RL","0701",,"4720N 00803E",
22174 ,"DE","MUH","M�lheim an der Ruhr","Mulheim an der Ruhr","NW","123-----","AF","0212",,"5126N 00653E",
27549 ,"EG","MUH","Matruh","Matruh",,"1--4----","RL","0901",,"3122N 02714E",
38582 ,"FR","MUH","M�ry-sur-Cher","Mery-sur-Cher","18","--3-----","RL","0501",,"4714N 00159E",
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| D | 2013-1_UNLOCODE_CodeListPart3.csv | 7616 ,"SK","MUH","Male Uherce","Male Uherce","TC","-----6--","RL","0901",,"4837N 01824E",
20465 ,"US","MUH","Muleshoe","Muleshoe","TX","--3-----","RQ","9307",,,
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| D | 2013-1_UNLOCODE_CodeListPart2.csv | 17558 ,"KE","MUH","Muhoroni","Muhoroni","600","--3-----","RL","1101",,"0009S 03511E",
|