Searched refs:MVEBU_CP_REGS_BASE (Results 1 – 11 of 11) sorted by relevance
33 #define MVEBU_CP_REGS_BASE(cp_index) (MVEBU_AP_IO_BASE(0) + \ macro50 #define MVEBU_CP_MPP_REGS(cp_index, n) (MVEBU_CP_REGS_BASE(cp_index) + \52 #define MVEBU_PM_MPP_REGS(cp_index, n) (MVEBU_CP_REGS_BASE(cp_index) + \55 (MVEBU_CP_REGS_BASE(cp_index) + \58 (MVEBU_CP_REGS_BASE(cp_index) + \60 #define MVEBU_CP_GPIO_DATA_IN(cp_index, n) (MVEBU_CP_REGS_BASE(cp_index) + \66 #define MVEBU_CP0_I2C_BASE (MVEBU_CP_REGS_BASE(0) + 0x701000)84 #define MVEBU_PCIE_X4_MAC_BASE(x) (MVEBU_CP_REGS_BASE(x) + 0x600000)85 #define MVEBU_COMPHY_BASE(x) (MVEBU_CP_REGS_BASE(x) + 0x441000)86 #define MVEBU_HPIPE_BASE(x) (MVEBU_CP_REGS_BASE(x) + 0x120000)
30 case MVEBU_CP_REGS_BASE(0): in marvell_get_amb_memory_map()34 case MVEBU_CP_REGS_BASE(1): in marvell_get_amb_memory_map()35 case MVEBU_CP_REGS_BASE(2): in marvell_get_amb_memory_map()127 case MVEBU_CP_REGS_BASE(0): in marvell_get_iob_memory_map()131 case MVEBU_CP_REGS_BASE(1): in marvell_get_iob_memory_map()135 case MVEBU_CP_REGS_BASE(2): in marvell_get_iob_memory_map()
34 {MVEBU_CP_REGS_BASE(0), 0x4000000, IO_0_TID}88 cp110_amb_init(MVEBU_CP_REGS_BASE(cp)); in bl2_plat_mmap_init()124 return MVEBU_CP_REGS_BASE(cp_idx) + 0x280000; in bl2_plat_get_cp_mss_regs()134 uint32_t revision = cp110_device_id_get(MVEBU_CP_REGS_BASE(0)); in bl2_plat_get_cp_count()
140 case MVEBU_CP_REGS_BASE(0): in marvell_get_iob_memory_map()144 case MVEBU_CP_REGS_BASE(1): in marvell_get_iob_memory_map()
144 case MVEBU_CP_REGS_BASE(0): in marvell_get_iob_memory_map()148 case MVEBU_CP_REGS_BASE(1): in marvell_get_iob_memory_map()
110 case MVEBU_CP_REGS_BASE(0): in marvell_get_iob_memory_map()114 case MVEBU_CP_REGS_BASE(1): in marvell_get_iob_memory_map()
225 device_id = cp110_device_id_get(MVEBU_CP_REGS_BASE(0)); in ble_plat_avs_config()458 device_id = cp110_device_id_get(MVEBU_CP_REGS_BASE(0)); in ble_plat_svc_config()746 cp110_ble_init(MVEBU_CP_REGS_BASE(0)); in ble_plat_setup()
119 cp110_init(MVEBU_CP_REGS_BASE(cp), in bl31_plat_arch_setup()
15 #define MG_CM3_CONFI_BASE(CP) (MVEBU_CP_REGS_BASE(CP) + 0x100000)
54 if (*addr == MVEBU_CP_REGS_BASE(cp_nr)) in is_cp_range_valid()
246 cp110_base = MVEBU_CP_REGS_BASE(cp_id); in update_cp110_default_win()