| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMLegalizerInfo.cpp | 292 {RTLIB::OLT_F64, CmpInst::BAD_ICMP_PREDICATE}}; in setFCmpLibcallsAEABI()
294 FCmp64Libcalls[CmpInst::FCMP_UGE] = {{RTLIB::OLT_F64, CmpInst::ICMP_EQ}}; in setFCmpLibcallsAEABI()
303 {RTLIB::OLT_F64, CmpInst::BAD_ICMP_PREDICATE}}; in setFCmpLibcallsAEABI()
335 FCmp64Libcalls[CmpInst::FCMP_OLT] = {{RTLIB::OLT_F64, CmpInst::ICMP_SLT}}; in setFCmpLibcallsGNU()
337 FCmp64Libcalls[CmpInst::FCMP_UGE] = {{RTLIB::OLT_F64, CmpInst::ICMP_SGE}}; in setFCmpLibcallsGNU()
344 {RTLIB::OLT_F64, CmpInst::ICMP_SLT}}; in setFCmpLibcallsGNU()
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| D | ARMISelLowering.cpp | 500 { RTLIB::OLT_F64, "__ltdf2vfp", ISD::SETNE }, in ARMTargetLowering()
563 { RTLIB::OLT_F64, "__aeabi_dcmplt", CallingConv::ARM_AAPCS, ISD::SETNE }, in ARMTargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMLegalizerInfo.cpp | 292 {RTLIB::OLT_F64, CmpInst::BAD_ICMP_PREDICATE}}; in setFCmpLibcallsAEABI()
294 FCmp64Libcalls[CmpInst::FCMP_UGE] = {{RTLIB::OLT_F64, CmpInst::ICMP_EQ}}; in setFCmpLibcallsAEABI()
303 {RTLIB::OLT_F64, CmpInst::BAD_ICMP_PREDICATE}}; in setFCmpLibcallsAEABI()
335 FCmp64Libcalls[CmpInst::FCMP_OLT] = {{RTLIB::OLT_F64, CmpInst::ICMP_SLT}}; in setFCmpLibcallsGNU()
337 FCmp64Libcalls[CmpInst::FCMP_UGE] = {{RTLIB::OLT_F64, CmpInst::ICMP_SGE}}; in setFCmpLibcallsGNU()
344 {RTLIB::OLT_F64, CmpInst::ICMP_SLT}}; in setFCmpLibcallsGNU()
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| D | ARMISelLowering.cpp | 473 { RTLIB::OLT_F64, "__ltdf2vfp", ISD::SETNE }, in ARMTargetLowering()
536 { RTLIB::OLT_F64, "__aeabi_dcmplt", CallingConv::ARM_AAPCS, ISD::SETNE }, in ARMTargetLowering()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | RuntimeLibcalls.h | 311 OLT_F64, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 77 { RTLIB::OLT_F64, "__mips16_ltdf2" },
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 77 { RTLIB::OLT_F64, "__mips16_ltdf2" },
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 78 { RTLIB::OLT_F64, "__mips16_ltdf2" },
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | RuntimeLibcalls.def | 374 HANDLE_LIBCALL(OLT_F64, "__ltdf2")
|
| /external/llvm-project/llvm/include/llvm/IR/ |
| D | RuntimeLibcalls.def | 393 HANDLE_LIBCALL(OLT_F64, "__ltdf2")
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 203 { RTLIB::OLT_F64, "__mspabi_cmpd", ISD::SETLT }, in MSP430TargetLowering()
330 setLibcallCallingConv(RTLIB::OLT_F64, CallingConv::MSP430_BUILTIN); in MSP430TargetLowering()
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| /external/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 202 { RTLIB::OLT_F64, "__mspabi_cmpd", ISD::SETLT }, in MSP430TargetLowering()
329 setLibcallCallingConv(RTLIB::OLT_F64, CallingConv::MSP430_BUILTIN); in MSP430TargetLowering()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 333 Names[RTLIB::OLT_F64] = "__ltdf2"; in InitLibcallNames()
776 CCs[RTLIB::OLT_F64] = ISD::SETLT; in InitCmpLibcallCCs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 308 Table[RTLIB::OLT_F64] = i32_func_f64_f64; in RuntimeLibcallSignatureTable()
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 312 Table[RTLIB::OLT_F64] = i32_func_f64_f64; in RuntimeLibcallSignatureTable()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 182 (VT == MVT::f64) ? RTLIB::OLT_F64 : in softenSetCCOperands()
210 (VT == MVT::f64) ? RTLIB::OLT_F64 : in softenSetCCOperands()
245 (VT == MVT::f64) ? RTLIB::OLT_F64 : in softenSetCCOperands()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 551 CCs[RTLIB::OLT_F64] = ISD::SETLT; in InitCmpLibcallCCs()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2111 setLibcallName(RTLIB::OLT_F64, "__hexagon_fast_ltdf2"); in HexagonTargetLowering()
2120 setLibcallName(RTLIB::OLT_F64, "__hexagon_ltdf2"); in HexagonTargetLowering()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 661 CCs[RTLIB::OLT_F64] = ISD::SETLT; in InitCmpLibcallCCs()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 324 (VT == MVT::f64) ? RTLIB::OLT_F64 : in softenSetCCOperands()
380 (VT == MVT::f64) ? RTLIB::OLT_F64 : in softenSetCCOperands()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 332 (VT == MVT::f64) ? RTLIB::OLT_F64 : in softenSetCCOperands()
388 (VT == MVT::f64) ? RTLIB::OLT_F64 : in softenSetCCOperands()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 204 { RTLIB::OLT_F64, "__ltdf2vfp", ISD::SETNE }, in ARMTargetLowering()
275 { RTLIB::OLT_F64, "__aeabi_dcmplt", CallingConv::ARM_AAPCS, ISD::SETNE }, in ARMTargetLowering()
|