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Searched refs:OP_TXD (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_emit_gk110.cpp1275 case OP_TXD: in emitTEX()
1293 case OP_TXD: in emitTEX()
1332 case OP_TXD: break; in emitTEX()
1347 if (i->op != OP_TXD && i->tex.derivAll) in emitTEX()
1379 case OP_TXD: code[1] |= 0x00400000; break; in emitTEX()
2653 case OP_TXD: in emitInstruction()
Dnv50_ir_target_gv100.cpp395 case OP_TXD: return &opInfo_TXD; in getOpInfo()
Dnv50_ir_lowering_nvc0.cpp1029 if (i->op != OP_TXD || chipset < NVISA_GM107_CHIPSET) { in handleTEX()
1039 i->op == OP_TXD || chipset < NVISA_GM107_CHIPSET)) { in handleTEX()
1120 if (i->op != OP_TXD || chipset < NVISA_GK104_CHIPSET) { in handleTEX()
1157 if (i->op == OP_TXD && chipset >= NVISA_GK104_CHIPSET) { in handleTEX()
3223 case OP_TXD: in visit()
Dnv50_ir_lowering_nv50.cpp730 if (i->tex.target.isCube() && i->op != OP_TXD) { in handleTEX()
1405 case OP_TXD: in visit()
Dnv50_ir_ra.cpp1180 case OP_TXD: in doCoalesce()
2395 if (tex->op == OP_TXD) { in texConstraintGM107()
2474 if (tex->op == OP_TXD && tex->tex.useOffsets) in texConstraintNVC0()
Dnv50_ir_emit_nvc0.cpp1333 case OP_TXD: code[1] = 0xe0000000; break; in emitTEX()
1346 if (i->op != OP_TXD && i->tex.derivAll) in emitTEX()
2823 case OP_TXD: in emitInstruction()
Dnv50_ir.h127 OP_TXD, // texture derivatives enumerator
Dnv50_ir.cpp938 if (op == OP_TXD) { in clone()
Dnv50_ir_emit_gv100.cpp1945 case OP_TXD: in emitInstruction()
Dnv50_ir_emit_nv50.cpp2050 case OP_TXD: in emitInstruction()
Dnv50_ir_emit_gm107.cpp3705 case OP_TXD: in emitInstruction()
Dnv50_ir_from_nir.cpp510 return OP_TXD; in getOperation()
Dnv50_ir_from_tgsi.cpp2332 if (texi->op == OP_TXD) { in handleTEX()