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Searched refs:OperandSize (Results 1 – 14 of 14) sorted by relevance

/external/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.h216 enum OperandSize { enum
313 static OperandSize OperandSizeFor(intptr_t cid);
315 static bool CanHoldLoadOffset(OperandSize size, int32_t offset,
317 static bool CanHoldStoreOffset(OperandSize size, int32_t offset,
664 void vaddqi(OperandSize sz, QRegister qd, QRegister qn, QRegister qm);
672 void vsubqi(OperandSize sz, QRegister qd, QRegister qn, QRegister qm);
680 void vmulqi(OperandSize sz, QRegister qd, QRegister qn, QRegister qm);
684 void vshlqi(OperandSize sz, QRegister qd, QRegister qm, QRegister qn);
686 void vshlqu(OperandSize sz, QRegister qd, QRegister qm, QRegister qn);
721 void vceqqi(OperandSize sz, QRegister qd, QRegister qn, QRegister qm);
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Dassembler_arm.cc1144 static inline int ShiftOfOperandSize(OperandSize size) { in ShiftOfOperandSize()
1171 void Assembler::EmitSIMDqqq(int32_t opcode, OperandSize size,
1189 void Assembler::EmitSIMDddd(int32_t opcode, OperandSize size, DRegister dd, in EmitSIMDddd()
1209 void Assembler::vaddqi(OperandSize sz,
1220 void Assembler::vsubqi(OperandSize sz, QRegister qd, QRegister qn, in vsubqi()
1231 void Assembler::vmulqi(OperandSize sz,
1242 void Assembler::vshlqi(OperandSize sz,
1249 void Assembler::vshlqu(OperandSize sz,
1320 void Assembler::vdup(OperandSize sz, QRegister qd, DRegister dm, int idx) { in vdup()
1364 void Assembler::vceqqi(OperandSize sz,
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/
DLowerMemIntrinsics.cpp106 unsigned OperandSize = getLoopOperandSizeInBytes(OpTy); in createMemCpyLoopKnownSize() local
107 uint64_t GepIndex = BytesCopied / OperandSize; in createMemCpyLoopKnownSize()
108 assert(GepIndex * OperandSize == BytesCopied && in createMemCpyLoopKnownSize()
128 BytesCopied += OperandSize; in createMemCpyLoopKnownSize()
/external/llvm-project/llvm/lib/Transforms/Utils/
DLowerMemIntrinsics.cpp103 unsigned OperandSize = DL.getTypeStoreSize(OpTy); in createMemCpyLoopKnownSize() local
104 uint64_t GepIndex = BytesCopied / OperandSize; in createMemCpyLoopKnownSize()
105 assert(GepIndex * OperandSize == BytesCopied && in createMemCpyLoopKnownSize()
126 BytesCopied += OperandSize; in createMemCpyLoopKnownSize()
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstructionSelector.cpp463 OperandSize(OpSize) {} in CmpConstants()
479 const unsigned OperandSize; member
545 if (!validOpRegPair(MRI, LHSReg, RHSReg, Helper.OperandSize, in selectCmp()
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrFormats.td174 class OperandSize<bits<2> val> {
177 def OpSizeFixed : OperandSize<0>; // Never needs a 0x66 prefix.
178 def OpSize16 : OperandSize<1>; // Needs 0x66 prefix in 32-bit mode.
179 def OpSize32 : OperandSize<2>; // Needs 0x66 prefix in 16-bit mode.
192 class OpSize16 { OperandSize OpSize = OpSize16; }
193 class OpSize32 { OperandSize OpSize = OpSize32; }
294 OperandSize OpSize = OpSizeFixed; // Does this instruction's encoding change
DX86InstrArithmetic.td543 bit hasOddOpcode, OperandSize opSize,
597 OperandSize OpSize = opSize;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrFormats.td167 class OperandSize<bits<2> val> {
170 def OpSizeFixed : OperandSize<0>; // Never needs a 0x66 prefix.
171 def OpSize16 : OperandSize<1>; // Needs 0x66 prefix in 32-bit mode.
172 def OpSize32 : OperandSize<2>; // Needs 0x66 prefix in 16-bit mode.
185 class OpSize16 { OperandSize OpSize = OpSize16; }
186 class OpSize32 { OperandSize OpSize = OpSize32; }
283 OperandSize OpSize = OpSizeFixed; // Does this instruction's encoding change
DX86InstrArithmetic.td543 bit hasOddOpcode, OperandSize opSize,
597 OperandSize OpSize = opSize;
/external/llvm/lib/Target/X86/
DX86InstrFormats.td146 class OperandSize<bits<2> val> {
149 def OpSizeFixed : OperandSize<0>; // Never needs a 0x66 prefix.
150 def OpSize16 : OperandSize<1>; // Needs 0x66 prefix in 32-bit mode.
151 def OpSize32 : OperandSize<2>; // Needs 0x66 prefix in 16-bit mode.
164 class OpSize16 { OperandSize OpSize = OpSize16; }
165 class OpSize32 { OperandSize OpSize = OpSize32; }
248 OperandSize OpSize = OpSizeFixed; // Does this instruction's encoding change
DX86InstrArithmetic.td554 bit hasOddOpcode, OperandSize opSize,
608 OperandSize OpSize = opSize;
DX86ISelLowering.cpp8582 int OperandSize = Mask.size() / V.getNumOperands(); in lowerVectorShuffleAsBroadcast() local
8583 V = V.getOperand(BroadcastIdx / OperandSize); in lowerVectorShuffleAsBroadcast()
8584 BroadcastIdx %= OperandSize; in lowerVectorShuffleAsBroadcast()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstructionSelector.cpp465 OperandSize(OpSize) {} in CmpConstants()
481 const unsigned OperandSize; member
547 if (!validOpRegPair(MRI, LHSReg, RHSReg, Helper.OperandSize, in selectCmp()
/external/llvm-project/llvm/docs/TableGen/
DProgRef.rst1873 OperandSize OpSize = OpSize32;