| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 811 POST_INC, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 989 POST_INC, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelDAGToDAG.cpp | 129 (AM != ISD::POST_INC && AM != ISD::PRE_DEC)) { in selectIndexedLoad()
173 if (LD->getExtensionType() != ISD::NON_EXTLOAD || AM != ISD::POST_INC) { in selectIndexedProgMemLoad()
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| D | AVRISelLowering.cpp | 116 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
117 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
120 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
121 setIndexedStoreAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
867 AM = ISD::POST_INC; in getPostIndexedAddressParts()
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| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRISelDAGToDAG.cpp | 129 (AM != ISD::POST_INC && AM != ISD::PRE_DEC)) { in selectIndexedLoad()
173 if (LD->getExtensionType() != ISD::NON_EXTLOAD || AM != ISD::POST_INC) { in selectIndexedProgMemLoad()
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| D | AVRISelLowering.cpp | 117 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
118 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
121 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
122 setIndexedStoreAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
866 AM = ISD::POST_INC; in getPostIndexedAddressParts()
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1212 enum MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC }; enumerator
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 301 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD) in isValidIndexedLoad()
|
| D | MSP430ISelLowering.cpp | 77 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering()
78 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
1107 AM = ISD::POST_INC; in getPostIndexedAddressParts()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 300 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD) in isValidIndexedLoad()
|
| D | MSP430ISelLowering.cpp | 62 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering()
63 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
1364 AM = ISD::POST_INC; in getPostIndexedAddressParts()
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| /external/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 300 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD) in isValidIndexedLoad()
|
| D | MSP430ISelLowering.cpp | 61 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering()
62 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
1359 AM = ISD::POST_INC; in getPostIndexedAddressParts()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 793 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
829 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
849 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
928 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
1046 if (AM != ISD::POST_INC) in SelectAddrMode6Offset()
1332 OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm8Offset()
1401 ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm7Offset()
1604 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD || in tryT1IndexedLoad()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 367 case ISD::POST_INC: return "<post-inc>"; in getIndexedModeName()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 813 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
849 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
869 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
948 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
1066 if (AM != ISD::POST_INC) in SelectAddrMode6Offset()
1379 OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm8Offset()
1448 ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm7Offset()
1651 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD || in tryT1IndexedLoad()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 905 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
941 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
961 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
1040 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
1135 if (AM != ISD::POST_INC) in SelectAddrMode6Offset()
1368 OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm8Offset()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 948 AM = isInc ? ISD::POST_INC : ISD::POST_DEC; in getPostIndexedAddressParts()
2067 setIndexedLoadAction(ISD::POST_INC, LSXTy, Legal); in HexagonTargetLowering()
2068 setIndexedStoreAction(ISD::POST_INC, LSXTy, Legal); in HexagonTargetLowering()
2073 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
2074 setIndexedStoreAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 459 case ISD::POST_INC: return "<post-inc>"; in getIndexedModeName()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 486 case ISD::POST_INC: return "<post-inc>"; in getIndexedModeName()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 73 setIndexedLoadAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
74 setIndexedStoreAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
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| D | HexagonISelLowering.cpp | 622 AM = ISD::POST_INC; in getPostIndexedAddressParts()
1608 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
1609 setIndexedStoreAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 912 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
918 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 630 AM = ISD::POST_INC; in getPostIndexedAddressParts()
1752 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
1753 setIndexedStoreAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 1188 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
1194 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
|