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Searched refs:PPCTargetLowering (Results 1 – 22 of 22) sorted by relevance

/external/llvm-project/llvm/lib/Target/PowerPC/GISel/
DPPCCallLowering.h23 class PPCTargetLowering; variable
27 PPCCallLowering(const PPCTargetLowering &TLI);
DPPCCallLowering.cpp23 PPCCallLowering::PPCCallLowering(const PPCTargetLowering &TLI) in PPCCallLowering()
/external/llvm/lib/Target/PowerPC/
DPPCTargetTransformInfo.h34 const PPCTargetLowering *TLI;
37 const PPCTargetLowering *getTLI() const { return TLI; } in getTLI()
DPPCISelLowering.cpp69 PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, in PPCTargetLowering() function in PPCTargetLowering
988 unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty, in getByValTypeAlignment()
1002 bool PPCTargetLowering::useSoftFloat() const { in useSoftFloat()
1006 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { in getTargetNodeName()
1103 EVT PPCTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &C, in getSetCCResultType()
1114 bool PPCTargetLowering::enableAggressiveFMAFusion(EVT VT) const { in enableAggressiveFMAFusion()
1761 bool PPCTargetLowering::SelectAddressRegReg(SDValue N, SDValue &Base, in SelectAddressRegReg()
1846 bool PPCTargetLowering::SelectAddressRegImm(SDValue N, SDValue &Disp, in SelectAddressRegImm()
1945 bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base, in SelectAddressRegRegOnly()
1973 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base, in getPreIndexedAddressParts()
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DPPCSubtarget.h146 PPCTargetLowering TLInfo;
179 const PPCTargetLowering *getTargetLowering() const override { in getTargetLowering()
DPPCISelLowering.h456 class PPCTargetLowering : public TargetLowering {
460 explicit PPCTargetLowering(const PPCTargetMachine &TM,
DREADME_ALTIVEC.txt304 is used in PPCISelLowering.cpp, PPCTargetLowering::LOWERVECTOR_SHUFFLE().
DPPCISelDAGToDAG.cpp70 const PPCTargetLowering *PPCLowering;
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp141 PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, in PPCTargetLowering() function in PPCTargetLowering
1414 unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty, in getByValTypeAlignment()
1424 bool PPCTargetLowering::useSoftFloat() const { in useSoftFloat()
1428 bool PPCTargetLowering::hasSPE() const { in hasSPE()
1432 bool PPCTargetLowering::preferIncOfAddToSubOfNot(EVT VT) const { in preferIncOfAddToSubOfNot()
1436 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { in getTargetNodeName()
1594 EVT PPCTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &C, in getSetCCResultType()
1602 bool PPCTargetLowering::enableAggressiveFMAFusion(EVT VT) const { in enableAggressiveFMAFusion()
2427 bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base, in SelectAddressEVXRegReg()
2463 bool PPCTargetLowering::SelectAddressRegReg( in SelectAddressRegReg()
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DPPCTargetTransformInfo.h32 const PPCTargetLowering *TLI;
35 const PPCTargetLowering *getTLI() const { return TLI; } in getTLI()
DPPCSubtarget.h161 PPCTargetLowering TLInfo;
203 const PPCTargetLowering *getTargetLowering() const override { in getTargetLowering()
DPPCISelLowering.h672 class PPCTargetLowering : public TargetLowering {
676 explicit PPCTargetLowering(const PPCTargetMachine &TM,
DPPCFrameLowering.cpp541 const PPCTargetLowering &TLI = *Subtarget.getTargetLowering(); in twoUniqueScratchRegsRequired()
610 const PPCTargetLowering &TLI = *Subtarget.getTargetLowering(); in emitPrologue()
1191 const PPCTargetLowering &TLI = *Subtarget.getTargetLowering(); in inlineStackProbe()
DREADME_ALTIVEC.txt299 is used in PPCISelLowering.cpp, PPCTargetLowering::LOWERVECTOR_SHUFFLE().
DPPCISelDAGToDAG.cpp144 const PPCTargetLowering *PPCLowering = nullptr;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp137 PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, in PPCTargetLowering() function in PPCTargetLowering
1315 unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty, in getByValTypeAlignment()
1329 bool PPCTargetLowering::useSoftFloat() const { in useSoftFloat()
1333 bool PPCTargetLowering::hasSPE() const { in hasSPE()
1337 bool PPCTargetLowering::preferIncOfAddToSubOfNot(EVT VT) const { in preferIncOfAddToSubOfNot()
1341 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { in getTargetNodeName()
1465 EVT PPCTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &C, in getSetCCResultType()
1476 bool PPCTargetLowering::enableAggressiveFMAFusion(EVT VT) const { in enableAggressiveFMAFusion()
2301 bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base, in SelectAddressEVXRegReg()
2323 bool PPCTargetLowering::SelectAddressRegReg(SDValue N, SDValue &Base, in SelectAddressRegReg()
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DPPCTargetTransformInfo.h32 const PPCTargetLowering *TLI;
35 const PPCTargetLowering *getTLI() const { return TLI; } in getTLI()
DPPCSubtarget.h154 PPCTargetLowering TLInfo;
190 const PPCTargetLowering *getTargetLowering() const override { in getTargetLowering()
DPPCISelLowering.h614 class PPCTargetLowering : public TargetLowering {
618 explicit PPCTargetLowering(const PPCTargetMachine &TM,
DREADME_ALTIVEC.txt304 is used in PPCISelLowering.cpp, PPCTargetLowering::LOWERVECTOR_SHUFFLE().
DPPCISelDAGToDAG.cpp142 const PPCTargetLowering *PPCLowering = nullptr;
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dzext-bitperm.ll5 ; Test case for PPCTargetLowering::extendSubTreeForBitPermutation.