/external/llvm/test/CodeGen/Mips/ |
D | atomic.ll | 159 ; ALL: and $[[R17:[0-9]+]], $[[R12]], $[[R7]] 160 ; ALL: srlv $[[R18:[0-9]+]], $[[R17]], $[[R5]] 204 ; ALL: and $[[R17:[0-9]+]], $[[R12]], $[[R7]] 205 ; ALL: srlv $[[R18:[0-9]+]], $[[R17]], $[[R5]] 244 ; ALL: or $[[R17:[0-9]+]], $[[R16]], $[[R15]] 245 ; ALL: sc $[[R17]], 0($[[R2]]) 246 ; NOT-MICROMIPS: beqz $[[R17]], $[[BB0]] 247 ; MICROMIPS: beqzc $[[R17]], $[[BB0]] 248 ; MIPSR6: beqzc $[[R17]], $[[BB0]] 293 ; NO-SEB-SEH: sll $[[R17:[0-9]+]], $[[R16]], 24 [all …]
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/external/llvm-project/llvm/test/CodeGen/AVR/ |
D | sext.ll | 3 ; sext R17:R16, R13 18 ; sext R17:R16, R16
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/external/llvm-project/llvm/test/CodeGen/Hexagon/ |
D | funnel-shift2.ll | 6 ; CHECK: r[[R17:[0-9]+]]:[[R16:[0-9]+]] = combine 9 ; CHECK: r[[R1]]:[[R0]] |= lsr(r[[R17]]:[[R16]],#1)
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/external/llvm-project/llvm/lib/Target/AVR/ |
D | AVRRegisterInfo.td | 61 def R17 : AVRReg<17, "r17">, DwarfRegNum<[17]>; 97 def R17R16 : AVRReg<16, "r17:r16", [R16, R17]>, DwarfRegNum<[16]>; 112 def R18R17 : AVRReg<17, "r18:r17", [R17, R18]>, DwarfRegNum<[17]>; 131 R28, R29, R17, R16, R15, R14, R13, R12, R11, R10, 149 R28, R29, R17, R16 155 add R23, R22, R21, R20, R19, R18, R17, R16
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/external/llvm/lib/Target/AVR/ |
D | AVRRegisterInfo.td | 62 def R17 : AVRReg<17, "r17">, DwarfRegNum<[17]>; 98 def R17R16 : AVRReg<16, "r17:r16", [R16, R17]>, DwarfRegNum<[16]>; 123 R28, R29, R17, R16, R15, R14, R13, R12, R11, R10, 141 R28, R29, R17, R16 147 add R23, R22, R21, R20, R19, R18, R17, R16
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
D | AVRRegisterInfo.td | 61 def R17 : AVRReg<17, "r17">, DwarfRegNum<[17]>; 97 def R17R16 : AVRReg<16, "r17:r16", [R16, R17]>, DwarfRegNum<[16]>; 120 R28, R29, R17, R16, R15, R14, R13, R12, R11, R10, 138 R28, R29, R17, R16 144 add R23, R22, R21, R20, R19, R18, R17, R16
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
D | ARCRegisterInfo.td | 49 def R17 : Core<17, "%r17">, DwarfRegNum<[17]>; 72 R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19,
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/external/llvm-project/llvm/lib/Target/ARC/ |
D | ARCRegisterInfo.td | 49 def R17 : Core<17, "%r17">, DwarfRegNum<[17]>; 72 R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19,
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/external/linux-kselftest/tools/testing/selftests/powerpc/stringloops/asm/ |
D | ppc_asm.h | 18 #define R17 r17 macro
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/external/linux-kselftest/tools/testing/selftests/powerpc/copyloops/asm/ |
D | ppc_asm.h | 13 #define R17 r17 macro
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
D | LanaiBaseInfo.h | 83 case Lanai::R17: in getLanaiRegisterNumbering()
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/external/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
D | LanaiBaseInfo.h | 83 case Lanai::R17: in getLanaiRegisterNumbering()
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/external/llvm/lib/Target/Lanai/MCTargetDesc/ |
D | LanaiBaseInfo.h | 84 case Lanai::R17: in getLanaiRegisterNumbering()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonRegisterInfo.cpp | 107 Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19, in getCalleeSavedRegs() 116 Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19, in getCalleeSavedRegs()
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/external/autotest/test_suites/ |
D | control.moblab_storage_qual | 18 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.telemetry_unit | 18 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.touch | 18 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.power_build | 16 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.telemetry_unit_server | 18 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.cellular_modem_repair | 15 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.power_dashboard | 16 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.wifichaos | 16 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.moblab_quick | 18 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.moblab | 18 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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D | control.platform_test | 20 Ex: x86-mario-release/R17-1412.33.0-a1-b29
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