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/external/llvm-project/llvm/test/MC/X86/
Dintel-syntax.s17 lea RDX, [8 * RAX + RBX + _foo]
19 lea RDX, [_foo + 8 * RAX + RBX]
21 lea RDX, [8 + RAX * 8 + RCX]
23 lea RDX, [number + 8 * RAX + RCX]
25 lea RDX, [_foo + RAX * 8]
27 lea RDX, [_foo + RAX * 8 + RBX]
29 lea RDX, [RAX - number]
31 lea RDX, [RAX - 8]
33 lea RDX, [RAX + _foo]
35 lea RDX, [RAX + number]
[all …]
Dintel-syntax-error.s30 lea RDX, [unknown_number * RAX + RBX + _foo]
32 lea RDX, [4 * RAX + 27 * RBX + _pat]
/external/llvm/test/CodeGen/X86/
Dabi-isel.ll56 ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r..]]
57 ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e..]]
85 ; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), [[RAX:%r..]]
86 ; DARWIN-64-STATIC-NEXT: movl ([[RAX]]), [[EAX:%e..]]
92 ; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), [[RAX:%r..]]
93 ; DARWIN-64-DYNAMIC-NEXT: movl ([[RAX]]), [[EAX:%e..]]
99 ; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), [[RAX:%r..]]
100 ; DARWIN-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e..]]
128 ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]]
129 ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e.x]]
[all …]
Dpr22103.ll13 ; CHECK: movq %fs:0, [[RAX:%r..]]
14 ; CHECK-NEXT: addq a@GOTTPOFF(%rip), [[RAX]]
15 ; CHECK-NEXT: callq *[[RAX]]
Dhuge-stack-offset.ll12 ; CHECK-64: movabsq $50000000{{..}}, [[RAX:%r..]]
13 ; CHECK-64-NEXT: addq [[RAX]], %rsp
/external/llvm/test/MC/X86/
Dintel-syntax.s21 mov RAX, QWORD PTR [RSP]
27 mov EAX, DWORD PTR [RSP + 4*RAX - 24]
67 mov RAX, QWORD PTR FS:[320]
69 mov RAX, QWORD PTR FS:320
71 mov QWORD PTR FS:320, RAX
73 mov QWORD PTR FS:20[rbx], RAX
382 shld [RAX], BX
383 shld [RAX], BX, CL
387 shrd [RAX], BX
388 shrd [RAX], BX, CL
[all …]
/external/llvm-project/llvm/test/tools/llvm-exegesis/X86/
Danalysis-noise.test10 - 'ADD64rr RAX RAX RDI'
13 - 'RAX=0x0'
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BtVer2/
Dclear-super-register-1.s4 ## Sets register RAX.
7 ## Kills the previous definition of RAX.
8 ## The upper portion of RAX is cleared.
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Barcelona/
Dclear-super-register-1.s4 ## Sets register RAX.
7 ## Kills the previous definition of RAX.
8 ## The upper portion of RAX is cleared.
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BdVer2/
Dclear-super-register-1.s4 ## Sets register RAX.
7 ## Kills the previous definition of RAX.
8 ## The upper portion of RAX is cleared.
/external/llvm-project/llvm/test/CodeGen/X86/
Dpr22103.ll13 ; CHECK: movq %fs:0, [[RAX:%r..]]
14 ; CHECK-NEXT: addq a@GOTTPOFF(%rip), [[RAX]]
15 ; CHECK-NEXT: callq *[[RAX]]
Dhuge-stack-offset.ll12 ; CHECK-64: movabsq $50000000{{..}}, [[RAX:%r..]]
13 ; CHECK-64-NEXT: addq [[RAX]], %rsp
/external/llvm/lib/Target/X86/
DX86InstrSVM.td35 let Uses = [RAX] in
43 let Uses = [RAX] in
51 let Uses = [RAX] in
59 let Uses = [RAX, ECX] in
DX86InstrArithmetic.td78 // RAX,RDX = RAX*GR64
79 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX], hasSideEffects = 0 in
82 [/*(set RAX, RDX, EFLAGS, (X86umul_flag RAX, GR64:$src))*/],
104 // RAX,RDX = RAX*[mem64]
105 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
123 // RAX,RDX = RAX*GR64
124 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
143 // RAX,RDX = RAX*[mem64]
144 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
306 // RDX:RAX/r64 = RAX,RDX
[all …]
DX86InstrExtension.td30 let Defs = [RAX], Uses = [EAX] in
32 "{cltq|cdqe}", [], IIC_CBW>; // RAX = signext(EAX)
34 let Defs = [RAX,RDX], Uses = [RAX] in
36 "{cqto|cqo}", [], IIC_CBW>; // RDX:RAX = signext(RAX)
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrSVM.td35 let Uses = [RAX] in
43 let Uses = [RAX] in
51 let Uses = [RAX] in
59 let Uses = [RAX, ECX] in
DX86InstrArithmetic.td77 // RAX,RDX = RAX*GR64
78 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX], hasSideEffects = 0 in
81 [/*(set RAX, RDX, EFLAGS, (X86umul_flag RAX, GR64:$src))*/]>,
101 // RAX,RDX = RAX*[mem64]
102 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
121 // RAX,RDX = RAX*GR64
122 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
139 // RAX,RDX = RAX*[mem64]
140 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
292 // RDX:RAX/r64 = RAX,RDX
[all …]
DX86CallingConv.td44 let GPR_64 = [RAX]; ///< Not actually used, but AssignToReg can't handle []
64 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R10, R11, R12, R14, R15];
71 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R12, R13, R14, R15];
221 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX]>>,
346 // The X86-Win64 calling convention always returns __m64 values in RAX.
349 // GCC returns FP values in RAX on Win64.
373 CCIfType<[i64], CCAssignToReg<[R15, RBP, RAX, RDX]>>
381 // Return: RAX
382 CCIfType<[i64], CCAssignToReg<[RAX]>>
395 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX, R8]>>,
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrSVM.td35 let Uses = [RAX] in
43 let Uses = [RAX] in
51 let Uses = [RAX] in
59 let Uses = [RAX, ECX] in
DX86InstrArithmetic.td77 // RAX,RDX = RAX*GR64
78 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX], hasSideEffects = 0 in
81 [/*(set RAX, RDX, EFLAGS, (X86umul_flag RAX, GR64:$src))*/]>,
101 // RAX,RDX = RAX*[mem64]
102 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
121 // RAX,RDX = RAX*GR64
122 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
139 // RAX,RDX = RAX*[mem64]
140 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
292 // RDX:RAX/r64 = RAX,RDX
[all …]
/external/llvm-project/llvm/unittests/tools/llvm-exegesis/X86/
DAssemblerTest.cpp22 using X86::RAX;
54 Check({}, MCInstBuilder(MOV64ri32).addReg(RAX).addImm(42), 0x48, 0xc7, 0xc0, in TEST_F()
/external/strace/linux/x86_64/
Dset_error.c20 return upoke(tcp, 8 * RAX, rval); in arch_set_error()
41 return upoke(tcp, 8 * RAX, rval); in arch_set_success()
/external/llvm-project/llvm/test/tools/llvm-dwarfdump/X86/
Ddebug_loc_offset.test8 # CHECK-A-NEXT: (0x0000000000000003, 0x0000000000000004): DW_OP_reg0 RAX
17 # CHECK-B-NEXT: (0x0000000000000013, 0x0000000000000014): DW_OP_reg0 RAX
Ddebugloc.s13 # CHECK-NEXT: (0x0000000000000003, 0x0000000000000004): DW_OP_reg0 RAX
17 # CHECK-NEXT: (0x0000000000000013, 0x0000000000000014): DW_OP_reg0 RAX
43 #DEBUG_VALUE: foo:i <- %RAX
62 #DEBUG_VALUE: bar:i <- %RAX
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp108 X86::SIL, X86::DIL, X86::BPL, X86::SPL, X86::RAX, X86::RBX, in initLLVMToSEHAndCVRegMapping()
293 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
305 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
342 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
378 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
414 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
415 return X86::RAX; in getX86SubSuperRegisterOrZero()

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