| /external/llvm-project/compiler-rt/lib/xray/ |
| D | xray_basic_logging.cpp | 157 template <class RDTSC>
159 RDTSC ReadTSC) XRAY_NEVER_INSTRUMENT { in InMemoryRawLog()
254 template <class RDTSC>
256 RDTSC ReadTSC) XRAY_NEVER_INSTRUMENT { in InMemoryRawLogWithArg()
|
| /external/llvm/test/CodeGen/X86/ |
| D | rdtsc.ll | 20 ; (i.e. RDTSC and RDTSCP).
|
| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | rdtsc.ll | 25 ; (i.e. RDTSC and RDTSCP).
|
| /external/libpcap/msdos/ |
| D | pkt_rx1.s | 19 ; .timeStamp resw 4 ; 64-bit RDTSC value
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 24 GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, XGETBV, ADX, FPCLASSS, enumerator
317 X86_INTRINSIC_DATA(rdtsc, RDTSC, X86::RDTSC, 0),
318 X86_INTRINSIC_DATA(rdtscp, RDTSC, X86::RDTSCP, 0),
|
| D | X86ScheduleZnver2.td | 790 // RDTSC.
791 def : InstRW<[WriteMicrocoded], (instregex "RDTSC")>;
|
| D | X86ScheduleZnver1.td | 790 // RDTSC.
791 def : InstRW<[WriteMicrocoded], (instregex "RDTSC")>;
|
| D | X86ScheduleAtom.td | 733 def : InstRW<[AtomWrite01_30], (instrs RDTSC, RDTSCP)>;
|
| D | X86InstrSystem.td | 17 def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", []>, TB;
|
| D | X86SchedBroadwell.td | 1402 def: InstRW<[BWWriteResGroup159], (instrs RDTSC)>;
|
| D | X86SchedSkylakeClient.td | 1537 def: InstRW<[SKLWriteResGroup184], (instrs CPUID, RDTSC)>;
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 24 GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, XGETBV, ADX, FPCLASSS, enumerator
317 X86_INTRINSIC_DATA(rdtsc, RDTSC, X86::RDTSC, 0),
318 X86_INTRINSIC_DATA(rdtscp, RDTSC, X86::RDTSCP, 0),
|
| D | X86ScheduleZnver2.td | 802 // RDTSC.
803 def : InstRW<[WriteMicrocoded], (instregex "RDTSC")>;
|
| D | X86ScheduleZnver1.td | 793 // RDTSC.
794 def : InstRW<[WriteMicrocoded], (instregex "RDTSC")>;
|
| D | X86ScheduleAtom.td | 736 def : InstRW<[AtomWrite01_30], (instrs RDTSC, RDTSCP)>;
|
| D | X86InstrSystem.td | 17 def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", []>, TB;
|
| D | X86SchedBroadwell.td | 1405 def: InstRW<[BWWriteResGroup159], (instrs RDTSC)>;
|
| D | X86SchedHaswell.td | 1652 def: InstRW<[HWWriteResGroup149], (instrs CPUID, RDTSC)>;
|
| D | X86SchedSkylakeClient.td | 1540 def: InstRW<[SKLWriteResGroup184], (instrs CPUID, RDTSC)>;
|
| /external/llvm-project/llvm/docs/CommandGuide/ |
| D | llvm-exegesis.rst | 190 `latency` mode can be make use of either RDTSC or LBR.
|
| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 24 GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX, FPCLASS, FPCLASSS, enumerator
226 X86_INTRINSIC_DATA(rdtsc, RDTSC, X86ISD::RDTSC_DAG, 0),
227 X86_INTRINSIC_DATA(rdtscp, RDTSC, X86ISD::RDTSCP_DAG, 0),
|
| D | X86SchedHaswell.td | 1049 // RDTSC.
1053 def : InstRW<[WriteRDTSC], (instregex "RDTSC")>;
|
| D | X86InstrSystem.td | 18 def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", [(X86rdtsc)], IIC_RDTSC>,
|
| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 805 #define RDTSC CHOICE(D_BYTE ARG2(15, 49), rdtsc, D_BYTE ARG2(15, 49)) macro
1300 #define RDTSC rdtsc macro
|
| /external/capstone/arch/X86/ |
| D | X86GenAsmWriter1_reduce.inc | 1149 2936U, // RDTSC
2867 0U, // RDTSC
|