Searched refs:REG_TYPE (Results 1 – 11 of 11) sorted by relevance
74 REG_TYPE s0= aX[0]; in presymmetry()75 REG_TYPE s2= aX[2]; in presymmetry()80 REG_TYPE s0= aX[0]; in presymmetry()81 REG_TYPE s2= aX[2]; in presymmetry()90 REG_TYPE ri0= aX[0]; in presymmetry()91 REG_TYPE ri2= aX[2]; in presymmetry()92 REG_TYPE ro0= bX[0]; in presymmetry()93 REG_TYPE ro2= bX[2]; in presymmetry()107 REG_TYPE s0 = x[0] + x[1]; in mdct_butterfly_8()108 REG_TYPE s1 = x[0] - x[1]; in mdct_butterfly_8()[all …]
45 #define REG_TYPE register ogg_int32_t macro
299 #define REG_TYPE(reg) (((reg) >> REG_TYPE_SHIFT) & REG_TYPE_MASK) macro360 (REG_TYPE(reg) << D0_TYPE_SHIFT) | \362 ((REG_TYPE(reg) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); \370 (REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT) | \373 OUT_BATCH((REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT) | \381 (REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT) | \384 OUT_BATCH((REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT) | \399 (REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT) | \404 (REG_TYPE(operand0) << A0_SRC0_TYPE_SHIFT) | \419 (REG_TYPE(operand1) << A1_SRC1_TYPE_SHIFT) | \[all …]
185 REG_TYPE(FS_T0) << D0_TYPE_SHIFT | in gen3_render_copyfunc()187 ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); in gen3_render_copyfunc()192 (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | in gen3_render_copyfunc()194 ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); in gen3_render_copyfunc()199 (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | in gen3_render_copyfunc()202 OUT_BATCH((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | in gen3_render_copyfunc()
198 REG_TYPE(FS_T0) << D0_TYPE_SHIFT | in copy()200 ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); in copy()205 (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | in copy()207 ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); in copy()212 (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | in copy()215 *b++ = ((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | in copy()
211 REG_TYPE(FS_T0) << D0_TYPE_SHIFT | in copy()213 ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); in copy()218 (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | in copy()220 ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); in copy()225 (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | in copy()228 *b++ = ((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | in copy()
224 REG_TYPE(FS_T0) << D0_TYPE_SHIFT | in render_copy()226 ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); in render_copy()231 (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) | in render_copy()233 ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); in render_copy()238 (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) | in render_copy()241 *b++ = ((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) | in render_copy()
380 #define REG_TYPE(reg) \ macro397 REG_TYPE(dst) in REG_TYPE() function398 REG_TYPE(src) in REG_TYPE()399 #undef REG_TYPE in REG_TYPE()442 #define REG_TYPE(reg) \ in REG_TYPE() macro470 REG_TYPE(dst)471 REG_TYPE(src0)472 REG_TYPE(src1)473 REG_TYPE(src2)474 #undef REG_TYPE[all …]
2508 - intel/compiler: Add a INVALID_{,HW_}REG_TYPE macros