Searched refs:RNDRRS (Results 1 – 12 of 12) sorted by relevance
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.5a-rand.txt | 9 # CHECK: mrs x1, RNDRRS
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| /external/vixl/src/aarch64/ |
| D | cpu-features-auditor-aarch64.cc | 1300 case RNDRRS: in VIXL_SIMPLE_SVE_VISITOR_LIST()
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| D | constants-aarch64.h | 503 RNDRRS = SystemRegisterEncoder<3, 3, 2, 4, 1>::value // Reseeded random number. enumerator
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| D | disasm-aarch64.cc | 10307 case RNDRRS: in SubstituteImmediateField()
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| D | assembler-aarch64.cc | 6230 case RNDRRS: in CPUHas()
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| D | simulator-aarch64.cc | 4539 case RNDRRS: { in VisitSystem()
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 293 RNDRRS = 55585,
2357 { "RNDRRS", 0xD921, true, false, {AArch64::FeatureRandGen} }, // 103
3504 { "RNDRRS", 103 },
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 689 def : ROSysReg<"RNDRRS", 0b11, 0b011, 0b0010, 0b0100, 0b001>;
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| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 2531 COMPARE(mrs(x5, RNDRRS), "mrs x5, rndrrs"); in TEST()
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| D | test-assembler-aarch64.cc | 6620 __ Mrs(x5, RNDRRS); in TEST()
6624 __ Mrs(x7, RNDRRS); in TEST()
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| D | test-cpu-features-aarch64.cc | 752 TEST_RNG(mrs_1, mrs(x0, RNDRRS))
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 694 def : ROSysReg<"RNDRRS", 0b11, 0b011, 0b0010, 0b0100, 0b001>;
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