Home
last modified time | relevance | path

Searched refs:RNG1 (Results 1 – 10 of 10) sorted by relevance

/external/arm-trusted-firmware/include/dt-bindings/clock/
Dstm32mp1-clks.h111 #define RNG1 98 macro
/external/llvm-project/llvm/test/Transforms/IndVarSimplify/
Dmonotonic_checks.ll90 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG1:!range !.*]]
129 ; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG1]]
/external/llvm-project/llvm/test/Transforms/InstCombine/
Dnarrow-math.ll464 ; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG1:!range !.*]]
465 ; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG1]]
480 ; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG1]]
481 ; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG1]]
601 ; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG1]]
Dcmp-intrinsic.ll332 ; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), [[RNG1:!range …
378 ; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), [[RNG1]]
Dcttz-abs.ll96 ; CHECK-NEXT: [[R:%.*]] = call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), [[RNG1:!range !.*]]
/external/llvm-project/llvm/test/Transforms/Attributor/
Dpotential.ll246 ; IS__TUNIT_NPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) [[ATTR0]], [[RNG1:!range …
253 ; IS__CGSCC_OPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) [[ATTR2]], [[RNG1:!range …
260 ; IS__CGSCC_NPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) [[ATTR1]], [[RNG1:!range …
274 ; IS__TUNIT_OPM-NEXT: [[CSRET2:%.*]] = call i32 @return3or4(i32 [[C]]) [[ATTR0]], [[RNG1:!range …
281 ; IS__TUNIT_NPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) [[ATTR0]], [[RNG1]]
289 ; IS__CGSCC_OPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) [[ATTR2]], [[RNG1]]
297 ; IS__CGSCC_NPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) [[ATTR1]], [[RNG1]]
Drange.ll345 ; IS__TUNIT____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, [[RNG1:!range !.*]]
353 ; IS__CGSCC____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, [[RNG1:!range !.*]]
/external/llvm-project/llvm/test/Transforms/SCCP/
Dintrinsics.ll65 ; CHECK-NEXT: [[X1:%.*]] = load i8, i8* [[P1:%.*]], align 1, [[RNG1:!range !.*]]
/external/llvm-project/llvm/test/Transforms/CorrelatedValuePropagation/
Drange.ll253 ; CHECK-NEXT: [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, [[RNG1:!range !.*]]
/external/arm-trusted-firmware/drivers/st/clk/
Dstm32mp1_clk.c503 _CLK_PARENT_SEL(RNG1, RCC_RNG1CKSELR, rng1_parents),