Searched refs:ResultRegs (Results 1 – 9 of 9) sorted by relevance
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 4340 SmallVector<Register, 5> ResultRegs(ResultNumRegs, Dst1Reg); in legalizeImageIntrinsic() local
4346 ResultRegs[0] = NewResultReg; in legalizeImageIntrinsic()
4350 ResultRegs[I] = MRI->createGenericVirtualRegister(RegTy); in legalizeImageIntrinsic()
4351 B.buildUnmerge(ResultRegs, NewResultReg); in legalizeImageIntrinsic()
4356 ResultRegs.resize(NumDataRegs); in legalizeImageIntrinsic()
4362 B.buildTrunc(DstReg, ResultRegs[0]); in legalizeImageIntrinsic()
4368 B.buildBitcast(DstReg, ResultRegs[0]); in legalizeImageIntrinsic()
4381 for (Register &Reg : ResultRegs) in legalizeImageIntrinsic()
4384 for (Register &Reg : ResultRegs) in legalizeImageIntrinsic()
4394 ResultRegs.push_back(Undef); in legalizeImageIntrinsic()
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| D | AMDGPURegisterBankInfo.cpp | 724 SmallVector<Register, 4> ResultRegs; in executeInWaterfallLoop() local
758 ResultRegs.push_back(Def.getReg()); in executeInWaterfallLoop()
808 for (auto Result : zip(InitResultRegs, ResultRegs, PhiRegs)) { in executeInWaterfallLoop()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 664 ArrayRef<Register> ResultRegs, in buildIntrinsic() argument
669 for (unsigned ResultReg : ResultRegs) in buildIntrinsic()
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| D | LegalizerHelper.cpp | 3223 Register ResultRegs[2]; in narrowScalarShift() local
3241 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
3242 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
3270 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
3271 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
3278 MIRBuilder.buildMerge(DstReg, ResultRegs); in narrowScalarShift()
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| D | IRTranslator.cpp | 1632 ArrayRef<Register> ResultRegs; in translateCall() local
1634 ResultRegs = getOrCreateVRegs(CI); in translateCall()
1639 MIRBuilder.buildIntrinsic(ID, ResultRegs, !F->doesNotAccessMemory()); in translateCall()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 3869 SmallVector<Register, 8> ResultRegs; in reduceOperationWidth() local
3898 ResultRegs.push_back(Inst.getReg(0)); in reduceOperationWidth()
3905 ResultRegs.append(NumUndefParts, in reduceOperationWidth()
3916 buildWidenedRemergeToDst(MergeDstReg, DstLCMTy, ResultRegs); in reduceOperationWidth()
4209 Register ResultRegs[2]; in narrowScalarShift() local
4227 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
4228 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
4256 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
4257 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
4264 MIRBuilder.buildMerge(DstReg, ResultRegs); in narrowScalarShift()
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| D | MachineIRBuilder.cpp | 693 ArrayRef<Register> ResultRegs, in buildIntrinsic() argument
698 for (unsigned ResultReg : ResultRegs) in buildIntrinsic()
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| D | IRTranslator.cpp | 2295 ArrayRef<Register> ResultRegs; in translateCall() local
2297 ResultRegs = getOrCreateVRegs(CI); in translateCall()
2302 MIRBuilder.buildIntrinsic(ID, ResultRegs, !F->doesNotAccessMemory()); in translateCall()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 739 SmallVector<Register, 4> ResultRegs; in executeInWaterfallLoop() local
762 ResultRegs.push_back(Def.getReg()); in executeInWaterfallLoop()
812 for (auto Result : zip(InitResultRegs, ResultRegs, PhiRegs)) { in executeInWaterfallLoop()
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