| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 340 unsigned RetOpc = I->getOpcode(); in hasTailCall() local
341 return RetOpc == Hexagon::PS_tailcall_i || RetOpc == Hexagon::PS_tailcall_r; in hasTailCall()
667 unsigned RetOpc = RetI ? RetI->getOpcode() : 0; in insertEpilogueInBlock() local
670 if (RetOpc == Hexagon::EH_RETURN_JMPR) { in insertEpilogueInBlock()
682 if (RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4 || in insertEpilogueInBlock()
683 RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4_PIC || in insertEpilogueInBlock()
684 RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT || in insertEpilogueInBlock()
685 RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC) { in insertEpilogueInBlock()
718 if (RetOpc != Hexagon::PS_jmpret || DisableDeallocRet) { in insertEpilogueInBlock()
1303 unsigned RetOpc; in insertCSRRestoresInBlock() local
[all …]
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 340 unsigned RetOpc = I->getOpcode(); in hasTailCall() local
341 return RetOpc == Hexagon::PS_tailcall_i || RetOpc == Hexagon::PS_tailcall_r; in hasTailCall()
791 unsigned RetOpc = RetI ? RetI->getOpcode() : 0; in insertEpilogueInBlock() local
794 if (RetOpc == Hexagon::EH_RETURN_JMPR) { in insertEpilogueInBlock()
806 if (RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4 || in insertEpilogueInBlock()
807 RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4_PIC || in insertEpilogueInBlock()
808 RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT || in insertEpilogueInBlock()
809 RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC) { in insertEpilogueInBlock()
844 if (RetOpc != Hexagon::PS_jmpret || DisableDeallocRet) { in insertEpilogueInBlock()
1454 unsigned RetOpc; in insertCSRRestoresInBlock() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RetpolineThunks.cpp | 256 const unsigned RetOpc = Is64Bit ? X86::RETQ : X86::RETL; in populateThunk() local
285 BuildMI(CallTarget, DebugLoc(), TII->get(RetOpc)); in populateThunk()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86IndirectThunks.cpp | 216 const unsigned RetOpc = Is64Bit ? X86::RETQ : X86::RETL; in populateThunk() local
252 BuildMI(CallTarget, DebugLoc(), TII->get(RetOpc)); in populateThunk()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 283 unsigned RetOpc = I->getOpcode(); in hasTailCall() local
284 return RetOpc == Hexagon::TCRETURNi || RetOpc == Hexagon::TCRETURNr; in hasTailCall()
590 unsigned RetOpc = RetI ? RetI->getOpcode() : 0; in insertEpilogueInBlock() local
600 if (RetOpc == Hexagon::EH_RETURN_JMPR) { in insertEpilogueInBlock()
610 if (RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4 || in insertEpilogueInBlock()
611 RetOpc == Hexagon::RESTORE_DEALLOC_RET_JMP_V4_PIC) { in insertEpilogueInBlock()
641 if (RetOpc != Hexagon::JMPret || DisableDeallocRet) { in insertEpilogueInBlock()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 2470 unsigned RetOpc; in LowerReturn() local
2472 RetOpc = RISCVISD::URET_FLAG; in LowerReturn()
2474 RetOpc = RISCVISD::SRET_FLAG; in LowerReturn()
2476 RetOpc = RISCVISD::MRET_FLAG; in LowerReturn()
2478 return DAG.getNode(RetOpc, DL, MVT::Other, RetOps); in LowerReturn()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 2157 unsigned RetOpc; in SelectRet() local
2160 RetOpc = ARM::tBXNS_RET; in SelectRet()
2164 RetOpc = Subtarget->getReturnOpcode(); in SelectRet()
2167 TII.get(RetOpc)); in SelectRet()
|
| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 3173 unsigned RetOpc; in LowerReturn() local
3175 RetOpc = RISCVISD::URET_FLAG; in LowerReturn()
3177 RetOpc = RISCVISD::SRET_FLAG; in LowerReturn()
3179 RetOpc = RISCVISD::MRET_FLAG; in LowerReturn()
3181 return DAG.getNode(RetOpc, DL, MVT::Other, RetOps); in LowerReturn()
|
| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 1379 unsigned RetOpc = in LowerReturn() local
1390 return DAG.getNode(RetOpc, dl, MVT::Other, RetOps); in LowerReturn()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 1418 unsigned RetOpc = in LowerReturn() local
1429 return DAG.getNode(RetOpc, dl, MVT::Other, RetOps); in LowerReturn()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 2151 unsigned RetOpc = isThumb2 ? ARM::tBX_RET : ARM::BX_RET; in SelectRet() local
2153 TII.get(RetOpc)); in SelectRet()
|