| /external/llvm/lib/Target/Mips/ |
| D | MipsTargetStreamer.h | 56 unsigned ReturnReg);
184 unsigned ReturnReg; variable
220 unsigned ReturnReg) override;
308 unsigned ReturnReg) override;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsTargetStreamer.h | 63 unsigned ReturnReg);
198 unsigned ReturnReg; variable
242 unsigned ReturnReg) override;
339 unsigned ReturnReg) override;
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsTargetStreamer.h | 61 unsigned ReturnReg);
199 unsigned ReturnReg; variable
243 unsigned ReturnReg) override;
343 unsigned ReturnReg) override;
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX8632.h | 65 Inst *emitCallToTarget(Operand *CallTarget, Variable *ReturnReg,
|
| D | IceTargetLoweringX8664.h | 68 Inst *emitCallToTarget(Operand *CallTarget, Variable *ReturnReg,
|
| D | IceTargetLoweringX8664.cpp | 642 Inst *TargetX8664::emitCallToTarget(Operand *CallTarget, Variable *ReturnReg, in emitCallToTarget() argument
705 if (ReturnReg != nullptr) { in emitCallToTarget()
706 Context.insert<InstFakeDef>(ReturnReg); in emitCallToTarget()
753 NewCall = Context.insert<Traits::Insts::Call>(ReturnReg, CallTarget); in emitCallToTarget()
|
| D | IceTargetLoweringX8632.cpp | 349 Inst *TargetX8632::emitCallToTarget(Operand *CallTarget, Variable *ReturnReg, in emitCallToTarget() argument
370 return Context.insert<Traits::Insts::Call>(ReturnReg, CallTarget); in emitCallToTarget()
|
| D | IceTargetLoweringMIPS32.cpp | 3467 Variable *ReturnReg = nullptr; in lowerCall() local
3480 ReturnReg = makeReg(Dest->getType(), RegMIPS32::Reg_V0); in lowerCall()
3483 ReturnReg = I32Reg(RegMIPS32::Reg_V0); in lowerCall()
3487 ReturnReg = makeReg(Dest->getType(), RegMIPS32::Reg_F0); in lowerCall()
3490 ReturnReg = makeReg(IceType_f64, RegMIPS32::Reg_F0); in lowerCall()
3498 ReturnReg = makeReg(Dest->getType(), RegMIPS32::Reg_V0); in lowerCall()
3499 auto *RetVec = llvm::dyn_cast<VariableVecOn32>(ReturnReg); in lowerCall()
3508 ReturnReg = makeReg(IceType_i32, RegMIPS32::Reg_V0); in lowerCall()
3545 if (ReturnReg && isVectorIntegerType(ReturnReg->getType())) { in lowerCall()
3551 .jal(ReturnReg, CallTarget); in lowerCall()
[all …]
|
| D | IceTargetLoweringARM32.cpp | 3777 Variable *ReturnReg = nullptr; in lowerCall() local
3792 ReturnReg = makeReg(Dest->getType(), RegARM32::Reg_r0); in lowerCall()
3795 ReturnReg = makeReg(IceType_i32, RegARM32::Reg_r0); in lowerCall()
3799 ReturnReg = makeReg(Dest->getType(), RegARM32::Reg_s0); in lowerCall()
3802 ReturnReg = makeReg(Dest->getType(), RegARM32::Reg_d0); in lowerCall()
3811 ReturnReg = makeReg(Dest->getType(), RegARM32::Reg_q0); in lowerCall()
3841 Sandboxer(this, InstBundleLock::Opt_AlignToEnd).bl(ReturnReg, CallTarget); in lowerCall()
3850 if (Instr->hasSideEffects() && ReturnReg) { in lowerCall()
3851 Context.insert<InstFakeUse>(ReturnReg); in lowerCall()
3856 if (ReturnReg != nullptr) { in lowerCall()
[all …]
|
| D | IceTargetLoweringX86BaseImpl.h | 2779 Variable *ReturnReg = nullptr;
2791 ReturnReg = makeReg(DestTy, Traits::RegisterSet::Reg_eax);
2795 ReturnReg = makeReg(IceType_i64, Traits::getRaxOrDie());
2797 ReturnReg = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax);
2816 ReturnReg = makeReg(DestTy, Traits::RegisterSet::Reg_xmm0);
2824 Inst *NewCall = emitCallToTarget(CallTarget, ReturnReg, NumVariadicFpArgs);
2843 if (Instr->hasSideEffects() && ReturnReg) {
2844 Context.insert<InstFakeUse>(ReturnReg);
2853 assert(ReturnReg && "Vector type requires a return register");
2855 _movp(Tmp, ReturnReg);
[all …]
|
| D | IceTargetLoweringMIPS32.h | 628 InstMIPS32Call *jal(Variable *ReturnReg, Operand *CallTarget);
|
| D | IceTargetLoweringARM32.h | 1083 InstARM32Call *bl(Variable *ReturnReg, Operand *CallTarget);
|
| D | IceTargetLoweringX86Base.h | 385 virtual Inst *emitCallToTarget(Operand *CallTarget, Variable *ReturnReg,
|
| /external/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 78 unsigned ReturnReg) {} in emitFrame() argument
508 unsigned ReturnReg) { in emitFrame() argument
512 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n'; in emitFrame()
1029 OS.emitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg in emitDirectiveEnd()
1113 ReturnReg = RegInfo->getEncodingValue(ReturnReg_); in emitFrame()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 78 unsigned ReturnReg) {} in emitFrame() argument
505 unsigned ReturnReg) { in emitFrame() argument
509 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n'; in emitFrame()
1010 OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg in emitDirectiveEnd()
1094 ReturnReg = RegInfo->getEncodingValue(ReturnReg_); in emitFrame()
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 66 unsigned ReturnReg) {} in emitFrame() argument
439 unsigned ReturnReg) { in emitFrame() argument
443 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n'; in emitFrame()
893 OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg in emitDirectiveEnd()
977 ReturnReg = RegInfo->getEncodingValue(ReturnReg_); in emitFrame()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 150 unsigned ReturnReg, unsigned char OperandFlags) const;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 200 unsigned ReturnReg, unsigned char OperandFlags) const;
|
| D | HexagonISelLowering.cpp | 1129 GlobalAddressSDNode *GA, SDValue Glue, EVT PtrVT, unsigned ReturnReg, in GetDynamicTLSAddr() argument
1158 return DAG.getCopyFromReg(Chain, dl, ReturnReg, PtrVT, Glue); in GetDynamicTLSAddr()
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 207 unsigned ReturnReg, unsigned char OperandFlags) const;
|
| D | HexagonISelLowering.cpp | 1256 GlobalAddressSDNode *GA, SDValue Glue, EVT PtrVT, unsigned ReturnReg, in GetDynamicTLSAddr() argument
1285 return DAG.getCopyFromReg(Chain, dl, ReturnReg, PtrVT, Glue); in GetDynamicTLSAddr()
|
| /external/llvm/lib/Target/X86/ |
| D | X86FrameLowering.cpp | 1560 unsigned ReturnReg = STI.is64Bit() ? X86::RAX : X86::EAX; in emitEpilogue() local
1563 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::LEA64r), ReturnReg) in emitEpilogue()
1571 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::MOV32ri), ReturnReg) in emitEpilogue()
|
| D | X86MCInstLower.cpp | 495 unsigned ReturnReg = Subtarget.is64Bit() ? X86::RAX : X86::EAX; in Lower() local
498 OutMI.addOperand(MCOperand::createReg(ReturnReg)); in Lower()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 741 unsigned ReturnReg = Subtarget.is64Bit() ? X86::RAX : X86::EAX; in Lower() local
744 OutMI.addOperand(MCOperand::createReg(ReturnReg)); in Lower()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 788 unsigned ReturnReg = Subtarget.is64Bit() ? X86::RAX : X86::EAX; in Lower() local
791 OutMI.addOperand(MCOperand::createReg(ReturnReg)); in Lower()
|