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Searched refs:SCR_NS_BIT (Results 1 – 16 of 16) sorted by relevance

/external/arm-trusted-firmware/lib/el3_runtime/aarch32/
Dcontext_mgmt.c74 scr &= ~(SCR_NS_BIT | SCR_HCE_BIT); in cm_setup_context()
77 scr |= SCR_NS_BIT; in cm_setup_context()
191 write_scr(read_scr() | SCR_NS_BIT); in cm_prepare_el3_exit()
200 write_scr(read_scr() & ~SCR_NS_BIT); in cm_prepare_el3_exit()
210 write_scr(read_scr() | SCR_NS_BIT); in cm_prepare_el3_exit()
319 write_scr(read_scr() & ~SCR_NS_BIT); in cm_prepare_el3_exit()
/external/arm-trusted-firmware/bl1/aarch32/
Dbl1_exceptions.S42 tst r8, #SCR_NS_BIT
106 and r7, r0, #SCR_NS_BIT /* flags */
109 bic r0, #SCR_NS_BIT
114 tst r7, #SCR_NS_BIT
141 tst r5, #SCR_NS_BIT
Dbl1_context_mgmt.c151 write_scr(read_scr() | SCR_NS_BIT); in bl1_prepare_next_image()
158 write_scr(read_scr() & ~SCR_NS_BIT); in bl1_prepare_next_image()
Dbl1_entrypoint.S80 tst r5, #SCR_NS_BIT
/external/arm-trusted-firmware/bl32/sp_min/
Dsp_min_main.c146 write_scr(read_scr() | SCR_NS_BIT); in sp_min_prepare_next_image_entry()
152 write_scr(read_scr() & ~SCR_NS_BIT); in sp_min_prepare_next_image_entry()
225 write_scr(read_scr() | SCR_NS_BIT); in sp_min_warm_boot()
231 write_scr(read_scr() & ~SCR_NS_BIT); in sp_min_warm_boot()
/external/arm-trusted-firmware/include/arch/aarch32/
Dsmccc_macros.S28 bic r2, r4, #SCR_NS_BIT
104 tst r4, #SCR_NS_BIT
142 tst r1, #SCR_NS_BIT
170 bic r2, r4, #SCR_NS_BIT
Del3_common_macros.S211 tst r0, #SCR_NS_BIT
Darch.h211 #define SCR_NS_BIT (UL(1) << 0) macro
215 #define GET_NS_BIT(scr) ((scr) & SCR_NS_BIT)
/external/arm-trusted-firmware/bl32/sp_min/aarch32/
Dentrypoint.S213 and r3, r0, #SCR_NS_BIT /* flags */
216 bic r0, #SCR_NS_BIT
260 bic r0, #SCR_NS_BIT
/external/arm-trusted-firmware/plat/arm/common/
Darm_common.c204 write_scr_el3(scr_el3 | SCR_NS_BIT); in plat_sdei_validate_entry_point()
/external/arm-trusted-firmware/lib/el3_runtime/aarch64/
Dcontext_mgmt.c90 scr_el3 &= ~(SCR_NS_BIT | SCR_RW_BIT | SCR_FIQ_BIT | SCR_IRQ_BIT | in cm_setup_context()
96 scr_el3 |= SCR_NS_BIT; in cm_setup_context()
Dcontext.S780 tst x10, #SCR_NS_BIT
856 tst x0, #SCR_NS_BIT
/external/arm-trusted-firmware/bl1/aarch64/
Dbl1_exceptions.S158 tst x30, #SCR_NS_BIT
/external/arm-trusted-firmware/drivers/arm/gic/v3/
Dgicv3_main.c308 write_scr_el3(scr_el3 | SCR_NS_BIT); in gicv3_cpuif_enable()
316 write_scr_el3(scr_el3 & (~SCR_NS_BIT)); in gicv3_cpuif_enable()
/external/arm-trusted-firmware/lib/psci/
Dpsci_common.c696 write_scr(scr | SCR_NS_BIT); in psci_get_ns_ep_info()
/external/arm-trusted-firmware/include/arch/aarch64/
Darch.h428 #define SCR_NS_BIT (UL(1) << 0) macro