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Searched refs:SEC_GRP0COND5 (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/renesas/common/
Dbl2_secure_setting.c148 { SEC_GRP0COND5, 0x00000040U },
/external/arm-trusted-firmware/plat/renesas/common/include/registers/
Dlifec_registers.h47 #define SEC_GRP0COND5 (LIFEC_SEC_BASE + 0x0180U) macro