| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | pr45709.ll | 6 ; There is code in the SDAG to expand FMAX/FMIN with fast flags to SELECT_CC.
7 ; On PPC, we had SELECT_CC legalized using Promote for all vector types
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.h | 29 SELECT_CC, enumerator
|
| D | BPFISelLowering.cpp | 72 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom); in BPFTargetLowering()
141 case ISD::SELECT_CC: in LowerOperation()
465 return DAG.getNode(BPFISD::SELECT_CC, DL, VTs, Ops); in LowerSELECT_CC()
476 case BPFISD::SELECT_CC: in getTargetNodeName()
|
| /external/llvm/test/CodeGen/ARM/ |
| D | 2010-04-09-NeonSelect.ll | 2 ; rdar://7770501 : Don't crash on SELECT and SELECT_CC with NEON vector values.
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | 2010-04-09-NeonSelect.ll | 2 ; rdar://7770501 : Don't crash on SELECT and SELECT_CC with NEON vector values.
|
| /external/llvm-project/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 356 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after
359 def SELECT_CC : PseudoInstXCore<(outs GRRegs:$dst),
361 "# SELECT_CC PSEUDO!",
1202 (SELECT_CC GRRegs:$lhs, GRRegs:$T, GRRegs:$F)>;
1205 (SELECT_CC GRRegs:$lhs, GRRegs:$F, GRRegs:$T)>;
1208 (SELECT_CC (LSS_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1210 (SELECT_CC (LSU_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1212 (SELECT_CC (LSS_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1214 (SELECT_CC (LSU_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1216 (SELECT_CC (EQ_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 356 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after
359 def SELECT_CC : PseudoInstXCore<(outs GRRegs:$dst),
361 "# SELECT_CC PSEUDO!",
1199 (SELECT_CC GRRegs:$lhs, GRRegs:$T, GRRegs:$F)>;
1202 (SELECT_CC GRRegs:$lhs, GRRegs:$F, GRRegs:$T)>;
1205 (SELECT_CC (LSS_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1207 (SELECT_CC (LSU_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1209 (SELECT_CC (LSS_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1211 (SELECT_CC (LSU_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1213 (SELECT_CC (EQ_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
[all …]
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 364 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after
367 def SELECT_CC : PseudoInstXCore<(outs GRRegs:$dst),
369 "# SELECT_CC PSEUDO!",
1207 (SELECT_CC GRRegs:$lhs, GRRegs:$T, GRRegs:$F)>;
1210 (SELECT_CC GRRegs:$lhs, GRRegs:$F, GRRegs:$T)>;
1213 (SELECT_CC (LSS_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1215 (SELECT_CC (LSU_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1217 (SELECT_CC (LSS_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1219 (SELECT_CC (LSU_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1221 (SELECT_CC (EQ_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.h | 28 SELECT_CC, enumerator
|
| D | BPFISelLowering.cpp | 103 setOperationAction(ISD::SELECT_CC, VT, Custom); in BPFTargetLowering()
196 case ISD::SELECT_CC: in LowerOperation()
528 return DAG.getNode(BPFISD::SELECT_CC, DL, VTs, Ops); in LowerSELECT_CC()
539 case BPFISD::SELECT_CC: in getTargetNodeName()
|
| /external/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.h | 28 SELECT_CC, enumerator
|
| D | BPFISelLowering.cpp | 102 setOperationAction(ISD::SELECT_CC, VT, Custom); in BPFTargetLowering()
227 case ISD::SELECT_CC: in LowerOperation()
561 return DAG.getNode(BPFISD::SELECT_CC, DL, VTs, Ops); in LowerSELECT_CC()
572 case BPFISD::SELECT_CC: in getTargetNodeName()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 161 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in R600TargetLowering()
162 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in R600TargetLowering()
280 setTargetDAGCombine(ISD::SELECT_CC); in R600TargetLowering()
489 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
994 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC); in LowerSELECT_CC()
1051 SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, in LowerSELECT_CC()
1075 SDValue Cond = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, LHS, RHS, HWTrue, HWFalse, CC); in LowerSELECT_CC()
1077 return DAG.getNode(ISD::SELECT_CC, DL, VT, in LowerSELECT_CC()
1869 if (SelectCC.getOpcode() != ISD::SELECT_CC || in PerformDAGCombine()
1877 return DAG.getNode(ISD::SELECT_CC, DL, N->getValueType(0), in PerformDAGCombine()
[all …]
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 161 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in R600TargetLowering()
162 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in R600TargetLowering()
280 setTargetDAGCombine(ISD::SELECT_CC); in R600TargetLowering()
489 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
999 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC); in LowerSELECT_CC()
1056 SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, in LowerSELECT_CC()
1080 SDValue Cond = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, LHS, RHS, HWTrue, HWFalse, CC); in LowerSELECT_CC()
1082 return DAG.getNode(ISD::SELECT_CC, DL, VT, in LowerSELECT_CC()
1875 if (SelectCC.getOpcode() != ISD::SELECT_CC || in PerformDAGCombine()
1883 return DAG.getNode(ISD::SELECT_CC, DL, N->getValueType(0), in PerformDAGCombine()
[all …]
|
| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.h | 39 SELECT_CC, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.h | 38 SELECT_CC, enumerator
|
| /external/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.h | 38 SELECT_CC, enumerator
|
| /external/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.h | 59 SELECT_CC enumerator
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 119 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in R600TargetLowering()
120 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in R600TargetLowering()
198 setTargetDAGCombine(ISD::SELECT_CC); in R600TargetLowering()
626 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
1161 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC); in LowerSELECT_CC()
1218 SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, in LowerSELECT_CC()
1242 SDValue Cond = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, LHS, RHS, HWTrue, HWFalse, CC); in LowerSELECT_CC()
1244 return DAG.getNode(ISD::SELECT_CC, DL, VT, in LowerSELECT_CC()
1975 if (SelectCC.getOpcode() != ISD::SELECT_CC || in PerformDAGCombine()
1984 return DAG.getNode(ISD::SELECT_CC, dl, N->getValueType(0), in PerformDAGCombine()
[all …]
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 62 SELECT_CC, enumerator
|
| D | MSP430ISelLowering.cpp | 112 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in MSP430TargetLowering()
113 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in MSP430TargetLowering()
190 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
957 return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, Ops); in LowerSETCC()
976 return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, Ops); in LowerSELECT_CC()
1128 case MSP430ISD::SELECT_CC: return "MSP430ISD::SELECT_CC"; in getTargetNodeName()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 364 SELECT_CC, enumerator
|
| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 103 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in AVRTargetLowering()
104 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in AVRTargetLowering()
105 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in AVRTargetLowering()
106 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in AVRTargetLowering()
260 NODE(SELECT_CC); in getTargetNodeName()
647 return DAG.getNode(AVRISD::SELECT_CC, dl, VTs, Ops); in LowerSELECT_CC()
664 return DAG.getNode(AVRISD::SELECT_CC, DL, VTs, Ops); in LowerSETCC()
698 case ISD::SELECT_CC: in LowerOperation()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 102 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in AVRTargetLowering()
103 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in AVRTargetLowering()
104 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in AVRTargetLowering()
105 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in AVRTargetLowering()
267 NODE(SELECT_CC); in getTargetNodeName()
648 return DAG.getNode(AVRISD::SELECT_CC, dl, VTs, Ops); in LowerSELECT_CC()
665 return DAG.getNode(AVRISD::SELECT_CC, DL, VTs, Ops); in LowerSETCC()
699 case ISD::SELECT_CC: in LowerOperation()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 64 SELECT_CC, enumerator
|