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Searched refs:SETGT (Results 1 – 25 of 133) sorted by relevance

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/external/llvm/test/CodeGen/AMDGPU/
Dunsupported-cc.ll56 ; CHECK-NEXT: SETGT {{\*? *}}T{{[0-9]+\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
91 ; CHECK: SETGT * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
105 ; CHECK-NEXT: SETGT {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
Dsetcc.ll156 ; R600: SETGT
184 ; R600: SETGT
Dsdiv.ll10 ; selectcc Remainder -1, 0, -1, SETGT
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dunsupported-cc.ll56 ; CHECK-NEXT: SETGT {{\*? *}}T{{[0-9]+\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
91 ; CHECK: SETGT * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
105 ; CHECK-NEXT: SETGT {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
Dsetcc.ll162 ; R600: SETGT
190 ; R600: SETGT
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h871 SETGT, // 1 X 0 1 0 True if greater than enumerator
884 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h1068 SETGT, // 1 X 0 1 0 True if greater than enumerator
1081 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h1284 SETGT, // 1 X 0 1 0 True if greater than enumerator
1297 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/external/llvm/lib/Target/Hexagon/
DHexagonSelectCCInfo.td25 IntRegs:$fval, SETGT)),
102 DoubleRegs:$fval, SETGT)),
/external/llvm-project/llvm/lib/Target/VE/
DVEISelDAGToDAG.cpp37 case ISD::SETGT: in intCondCode2Icc()
70 case ISD::SETGT: in fpCondCode2Fcc()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp2980 case ISD::SETGT: { in get32BitZExtCompare()
3161 case ISD::SETGT: { in get32BitSExtCompare()
3318 case ISD::SETGT: { in get64BitZExtCompare()
3479 case ISD::SETGT: { in get64BitSExtCompare()
3806 case ISD::SETGT: in SelectCC()
3833 case ISD::SETGT: in SelectCC()
3877 case ISD::SETGT: in getPredicateForSetCC()
3900 case ISD::SETGT: return 1; // Bit #1 = SETOGT in getCRIdxForSetCC()
3934 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
3958 case ISD::SETGT: in getVCmpInst()
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp2940 case ISD::SETGT: { in get32BitZExtCompare()
3121 case ISD::SETGT: { in get32BitSExtCompare()
3278 case ISD::SETGT: { in get64BitZExtCompare()
3439 case ISD::SETGT: { in get64BitSExtCompare()
3772 case ISD::SETGT: in SelectCC()
3799 case ISD::SETGT: in SelectCC()
3848 case ISD::SETGT: in getPredicateForSetCC()
3871 case ISD::SETGT: return 1; // Bit #1 = SETOGT in getCRIdxForSetCC()
3906 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
3930 case ISD::SETGT: in getVCmpInst()
[all …]
/external/llvm/lib/CodeGen/
DAnalysis.cpp190 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
209 case ICmpInst::ICMP_SGT: return ISD::SETGT; in getICmpCondCode()
DTargetLoweringBase.cpp783 CCs[RTLIB::OGT_F32] = ISD::SETGT; in InitCmpLibcallCCs()
784 CCs[RTLIB::OGT_F64] = ISD::SETGT; in InitCmpLibcallCCs()
785 CCs[RTLIB::OGT_F128] = ISD::SETGT; in InitCmpLibcallCCs()
786 CCs[RTLIB::OGT_PPCF128] = ISD::SETGT; in InitCmpLibcallCCs()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td50 defm GT_S : ComparisonInt<SETGT, "gt_s">;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DAnalysis.cpp229 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
248 case ICmpInst::ICMP_SGT: return ISD::SETGT; in getICmpCondCode()
DTargetLoweringBase.cpp558 CCs[RTLIB::OGT_F32] = ISD::SETGT; in InitCmpLibcallCCs()
559 CCs[RTLIB::OGT_F64] = ISD::SETGT; in InitCmpLibcallCCs()
560 CCs[RTLIB::OGT_F128] = ISD::SETGT; in InitCmpLibcallCCs()
561 CCs[RTLIB::OGT_PPCF128] = ISD::SETGT; in InitCmpLibcallCCs()
/external/llvm-project/llvm/lib/CodeGen/
DAnalysis.cpp230 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
249 case ICmpInst::ICMP_SGT: return ISD::SETGT; in getICmpCondCode()
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp191 case ISD::SETGT: in softenSetCCOperands()
1583 case ISD::SETGT: in SimplifySetCC()
1752 ISD::CondCode NewCC = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; in SimplifySetCC()
1782 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal) in SimplifySetCC()
1788 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MinVal) in SimplifySetCC()
1800 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal-1) in SimplifySetCC()
1821 return DAG.getSetCC(dl, VT, N0, ConstMinusOne, ISD::SETGT); in SimplifySetCC()
2142 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> ~X & Y in SimplifySetCC()
3136 ISD::SETGT); in expandFP_TO_SINT()
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp2106 case ISD::SETGT: return PPC::PRED_GT; in getPredicateForSetCC()
2127 case ISD::SETGT: return 1; // Bit #1 = SETOGT in getCRIdxForSetCC()
2161 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
2185 case ISD::SETGT: in getVCmpInst()
2207 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
2216 case ISD::SETLE: CC = ISD::SETGT; Negate = true; break; in getVCmpInst()
2233 case ISD::SETGT: in getVCmpInst()
2298 case ISD::SETGT: { in trySETCC()
2341 case ISD::SETGT: { in trySETCC()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFISelLowering.cpp687 SET_NEWCC(SETGT, JSGT); in EmitInstrWithCustomInserter()
702 bool isSignedCmp = (CC == ISD::SETGT || in EmitInstrWithCustomInserter()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIInsertSkips.cpp283 case ISD::SETGT: in kill()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td78 defm GT_S : ComparisonInt<SETGT, "gt_s", 0x4a, 0x55>;
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td78 defm GT_S : ComparisonInt<SETGT, "gt_s", 0x4a, 0x55>;
/external/llvm-project/llvm/lib/Target/BPF/
DBPFISelLowering.cpp726 SET_NEWCC(SETGT, JSGT); in EmitInstrWithCustomInserter()
741 bool isSignedCmp = (CC == ISD::SETGT || in EmitInstrWithCustomInserter()

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