/external/clang/test/CodeGenCXX/ |
D | rtti-layout.cpp | 73 struct SI1 : A { }; struct 114 CHECK_VTABLE(SI1, si_class); in f() 115 CHECK(to<__si_class_type_info>(typeid(SI1)).__base_type == &typeid(A)); in f()
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/external/llvm-project/clang/test/CodeGenCXX/ |
D | rtti-layout.cpp | 73 struct SI1 : A { }; struct 114 CHECK_VTABLE(SI1, si_class); in f() 115 CHECK(to<__si_class_type_info>(typeid(SI1)).__base_type == &typeid(A)); in f()
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/external/skia/src/gpu/ |
D | GrTBlockList.h | 294 template <typename T, int SI1> 296 void GrTBlockList<T, SI1>::concat(GrTBlockList<T, SI2>&& other) { in concat()
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstructionCombining.cpp | 634 if (auto *SI1 = dyn_cast<SelectInst>(RHS)) { in SimplifyUsingDistributiveLaws() local 635 if (SI0->getCondition() == SI1->getCondition()) { in SimplifyUsingDistributiveLaws() 638 SI1->getFalseValue(), DL, TLI, DT, AC)) in SimplifyUsingDistributiveLaws() 642 SI1->getTrueValue()), in SimplifyUsingDistributiveLaws() 645 SI1->getTrueValue(), DL, TLI, DT, AC)) in SimplifyUsingDistributiveLaws() 649 SI1->getFalseValue())); in SimplifyUsingDistributiveLaws()
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/external/rust/crates/libz-sys/src/zlib-ng/doc/ |
D | rfc1952.txt | 438 |SI1|SI2| LEN |... LEN bytes of subfield data ...| 441 SI1 and SI2 provide a subfield ID, typically two ASCII letters 455 SI1 SI2 Data
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/external/rust/crates/libz-sys/src/zlib/doc/ |
D | rfc1952.txt | 438 |SI1|SI2| LEN |... LEN bytes of subfield data ...| 441 SI1 and SI2 provide a subfield ID, typically two ASCII letters 455 SI1 SI2 Data
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
D | SimplifyCFG.cpp | 230 SafeToMergeTerminators(Instruction *SI1, Instruction *SI2, in SafeToMergeTerminators() argument 232 if (SI1 == SI2) in SafeToMergeTerminators() 238 BasicBlock *SI1BB = SI1->getParent(); in SafeToMergeTerminators() 262 isProfitableToFoldUnconditional(BranchInst *SI1, BranchInst *SI2, in isProfitableToFoldUnconditional() argument 265 if (SI1 == SI2) in isProfitableToFoldUnconditional() 267 assert(SI1->isUnconditional() && SI2->isConditional()); in isProfitableToFoldUnconditional() 283 BasicBlock *SI1BB = SI1->getParent(); in isProfitableToFoldUnconditional()
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/external/llvm/lib/Transforms/Utils/ |
D | SimplifyCFG.cpp | 177 static bool SafeToMergeTerminators(TerminatorInst *SI1, TerminatorInst *SI2) { in SafeToMergeTerminators() argument 178 if (SI1 == SI2) in SafeToMergeTerminators() 184 BasicBlock *SI1BB = SI1->getParent(); in SafeToMergeTerminators() 204 isProfitableToFoldUnconditional(BranchInst *SI1, BranchInst *SI2, in isProfitableToFoldUnconditional() argument 207 if (SI1 == SI2) in isProfitableToFoldUnconditional() 209 assert(SI1->isUnconditional() && SI2->isConditional()); in isProfitableToFoldUnconditional() 225 BasicBlock *SI1BB = SI1->getParent(); in isProfitableToFoldUnconditional()
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/external/llvm-project/llvm/lib/Transforms/Utils/ |
D | SimplifyCFG.cpp | 273 SafeToMergeTerminators(Instruction *SI1, Instruction *SI2, in SafeToMergeTerminators() argument 275 if (SI1 == SI2) in SafeToMergeTerminators() 281 BasicBlock *SI1BB = SI1->getParent(); in SafeToMergeTerminators() 305 isProfitableToFoldUnconditional(BranchInst *SI1, BranchInst *SI2, in isProfitableToFoldUnconditional() argument 308 if (SI1 == SI2) in isProfitableToFoldUnconditional() 310 assert(SI1->isUnconditional() && SI2->isConditional()); in isProfitableToFoldUnconditional() 326 BasicBlock *SI1BB = SI1->getParent(); in isProfitableToFoldUnconditional()
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/external/llvm-project/llvm/unittests/IR/ |
D | PatternMatch.cpp | 954 Value *SI1 = IRB.CreateShuffleVector(VI1, UndefVec, Zero); in TEST_F() local 995 EXPECT_TRUE(match(SI1, m_Shuffle(m_Value(), m_Undef(), m_ZeroMask()))); in TEST_F() 1003 SI1, in TEST_F()
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/external/llvm-project/mlir/include/mlir/IR/ |
D | OpBase.td | 405 def SI1 : SI<1>; 954 SI1, "bool", "1-bit signed integer attribute">;
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 10273 auto SI1 = SelectTruncOp[1].find(PromOp.getNode()); in DAGCombineExtBoolTrunc() local 10274 if (SI1 != SelectTruncOp[1].end()) in DAGCombineExtBoolTrunc() 10275 Ops[1] = DAG.getNode(ISD::TRUNCATE, dl, SI1->second, Ops[1]); in DAGCombineExtBoolTrunc()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 12863 auto SI1 = SelectTruncOp[1].find(PromOp.getNode()); in DAGCombineExtBoolTrunc() local 12864 if (SI1 != SelectTruncOp[1].end()) in DAGCombineExtBoolTrunc() 12865 Ops[1] = DAG.getNode(ISD::TRUNCATE, dl, SI1->second, Ops[1]); in DAGCombineExtBoolTrunc()
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 13670 auto SI1 = SelectTruncOp[1].find(PromOp.getNode()); in DAGCombineExtBoolTrunc() local 13671 if (SI1 != SelectTruncOp[1].end()) in DAGCombineExtBoolTrunc() 13672 Ops[1] = DAG.getNode(ISD::TRUNCATE, dl, SI1->second, Ops[1]); in DAGCombineExtBoolTrunc()
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