| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 238 SMULO, UMULO, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 258 SMULO, UMULO, enumerator
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 311 SMULO, enumerator
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| D | SelectionDAGNodes.h | 2729 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO));
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 232 case ISD::SMULO: return "smulo"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 136 case ISD::SMULO: in PromoteIntegerResult()
772 if (N->getOpcode() == ISD::SMULO) { in PromoteIntRes_XMULO()
1402 case ISD::SMULO: ExpandIntRes_XMULO(N, Lo, Hi); break; in ExpandIntegerResult()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 325 case Intrinsic::smul_with_overflow: Opcode = ISD::SMULO; break; in mightUseCTR()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 449 case ISD::SMULO: in LegalizeOp()
833 case ISD::SMULO: in Expand()
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| D | SelectionDAGDumper.cpp | 301 case ISD::SMULO: return "smulo"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 147 case ISD::SMULO: in PromoteIntegerResult()
1332 if (N->getOpcode() == ISD::SMULO) { in PromoteIntRes_XMULO()
2136 case ISD::SMULO: ExpandIntRes_XMULO(N, Lo, Hi); break; in ExpandIntegerResult()
3372 unsigned MulOp = Signed ? ISD::SMULO : ISD::UMULO; in ExpandIntRes_MULFIX()
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| D | LegalizeVectorTypes.cpp | 170 case ISD::SMULO: in ScalarizeVectorResult()
1023 case ISD::SMULO: in SplitVectorResult()
2931 case ISD::SMULO: in WidenVectorResult()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 296 case ISD::SMULO: return "smulo"; in getOperationName()
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| D | LegalizeVectorOps.cpp | 452 case ISD::SMULO: in LegalizeOp()
943 case ISD::SMULO: in Expand()
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| D | LegalizeIntegerTypes.cpp | 145 case ISD::SMULO: in PromoteIntegerResult()
1139 if (N->getOpcode() == ISD::SMULO) { in PromoteIntRes_XMULO()
1904 case ISD::SMULO: ExpandIntRes_XMULO(N, Lo, Hi); break; in ExpandIntegerResult()
3040 unsigned MulOp = Signed ? ISD::SMULO : ISD::UMULO; in ExpandIntRes_MULFIX()
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| D | LegalizeVectorTypes.cpp | 161 case ISD::SMULO: in ScalarizeVectorResult()
956 case ISD::SMULO: in SplitVectorResult()
2767 case ISD::SMULO: in WidenVectorResult()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 532 case Intrinsic::smul_with_overflow: Opcode = ISD::SMULO; break; in mightUseCTR()
|
| /external/llvm-project/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1682 setOperationAction(ISD::SMULO, MVT::i64, Custom); in SparcTargetLowering()
2942 assert((opcode == ISD::UMULO || opcode == ISD::SMULO) && "Invalid Opcode."); in LowerUMULO_SMULO()
2944 bool isSigned = (opcode == ISD::SMULO); in LowerUMULO_SMULO()
3063 case ISD::SMULO: return LowerUMULO_SMULO(Op, DAG, *this); in LowerOperation()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1708 setOperationAction(ISD::SMULO, MVT::i64, Custom); in SparcTargetLowering()
2961 assert((opcode == ISD::UMULO || opcode == ISD::SMULO) && "Invalid Opcode."); in LowerUMULO_SMULO()
2963 bool isSigned = (opcode == ISD::SMULO); in LowerUMULO_SMULO()
3082 case ISD::SMULO: return LowerUMULO_SMULO(Op, DAG, *this); in LowerOperation()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1675 setOperationAction(ISD::SMULO, MVT::i64, Custom); in SparcTargetLowering()
2936 assert((opcode == ISD::UMULO || opcode == ISD::SMULO) && "Invalid Opcode."); in LowerUMULO_SMULO()
2938 bool isSigned = (opcode == ISD::SMULO); in LowerUMULO_SMULO()
3057 case ISD::SMULO: return LowerUMULO_SMULO(Op, DAG, *this); in LowerOperation()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 247 setOperationAction(ISD::SMULO, MVT::i32, Custom); in AArch64TargetLowering()
248 setOperationAction(ISD::SMULO, MVT::i64, Custom); in AArch64TargetLowering()
1644 case ISD::SMULO: in getAArch64XALUOOp()
1647 bool IsSigned = Op.getOpcode() == ISD::SMULO; in getAArch64XALUOOp()
2346 case ISD::SMULO: in LowerOperation()
3639 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { in LowerBR_CC()
4088 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { in LowerSELECT()
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| /external/llvm/test/CodeGen/X86/ |
| D | xaluo.ll | 294 ; SMULO
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 669 setOperationAction(ISD::SMULO, VT, Expand); in initActions()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 883 setOperationAction(ISD::SMULO, VT, Expand); in initActions()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 783 setOperationAction(ISD::SMULO, VT, Expand); in initActions()
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| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | xmulo.ll | 40 ; SMULO
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