/external/mesa3d/src/amd/compiler/ |
D | aco_opcodes.py | 37 SOPK = 3 variable in Format 63 if self == Format.SOPK: 355 SOPK = { variable 386 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SOPK: 387 opcode(name, gfx7, gfx9, gfx10, Format.SOPK)
|
D | aco_opt_value_numbering.cpp | 101 case Format::SOPK: in operator ()() 221 case Format::SOPK: { in operator ()()
|
D | aco_spill.cpp | 246 … instr->format != Format::SOP1 && instr->format != Format::PSEUDO && instr->format != Format::SOPK) in should_rematerialize() 252 if (instr->format == Format::SOPK && instr->opcode != aco_opcode::s_movk_i32) in should_rematerialize() 273 …ormat::SOP1 || instr->format == Format::PSEUDO || instr->format == Format::SOPK) && "unsupported"); in do_reload() 284 } else if (instr->format == Format::SOPK) { in do_reload()
|
D | aco_ir.h | 74 SOPK = 3, enumerator 931 format == Format::SOPK || in isSALU()
|
D | aco_print_ir.cpp | 264 case Format::SOPK: { in print_instr_format_specific()
|
D | aco_insert_NOPs.cpp | 738 …ction> wait{create_instruction<SOPK_instruction>(aco_opcode::s_waitcnt_vscnt, Format::SOPK, 0, 1)}; in handle_instruction_gfx10()
|
D | aco_insert_waitcnt.cpp | 856 …waitcnt_vs = create_instruction<SOPK_instruction>(aco_opcode::s_waitcnt_vscnt, Format::SOPK, 0, 1); in emit_waitcnt()
|
D | aco_assembler.cpp | 111 case Format::SOPK: { in emit_instruction()
|
/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 28 field bits<1> SOPK = 0; 64 let TSFlags{8} = SOPK; 319 class SOPK <dag outs, dag ins, string asm, list<dag> pattern> : 326 let SOPK = 1;
|
D | SIDefines.h | 25 SOPK = 1 << 8, enumerator
|
D | SIInstrInfo.h | 232 return MI.getDesc().TSFlags & SIInstrFlags::SOPK; in isSOPK() 236 return get(Opcode).TSFlags & SIInstrFlags::SOPK; in isSOPK()
|
D | SIInstrInfo.td | 892 SOPK <outs, ins, "", pattern>, 899 SOPK <outs, ins, asm, []>, 909 SOPK <outs, ins, asm, []>, 967 def _si : SOPK <outs, ins, asm, []>, 976 def _vi : SOPK <outs, ins, asm, []>,
|
D | SIInstructions.td | 348 // SOPK Instructions
|
/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 24 field bit SOPK = 0; 145 let TSFlags{5} = SOPK;
|
D | SIDefines.h | 28 SOPK = 1 << 5, enumerator
|
D | SIInstrInfo.h | 388 return MI.getDesc().TSFlags & SIInstrFlags::SOPK; in isSOPK() 392 return get(Opcode).TSFlags & SIInstrFlags::SOPK; in isSOPK()
|
D | SOPInstructions.td | 671 // SOPK Instructions 684 let SOPK = 1; 872 let Size = 8; // Unlike every other SOPK instruction. 1599 // SOPK - GFX10. 1622 // SOPK - GFX6, GFX7.
|
D | SIInstrInfo.td | 2444 // Get equivalent SOPK instruction.
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 24 field bit SOPK = 0; 137 let TSFlags{5} = SOPK;
|
D | SIDefines.h | 28 SOPK = 1 << 5, enumerator
|
D | SOPInstructions.td | 606 // SOPK Instructions 619 let SOPK = 1; 787 let Size = 8; // Unlike every other SOPK instruction. 1447 // SOPK - GFX10. 1470 // SOPK - GFX6, GFX7.
|
D | SIInstrInfo.h | 382 return MI.getDesc().TSFlags & SIInstrFlags::SOPK; in isSOPK() 386 return get(Opcode).TSFlags & SIInstrFlags::SOPK; in isSOPK()
|
D | SIInstrInfo.td | 2461 // Get equivalent SOPK instruction.
|
/external/llvm-project/llvm/docs/AMDGPU/ |
D | AMDGPUAsmGFX7.rst | 574 SOPK section in Instructions
|
D | AMDGPUAsmGFX8.rst | 600 SOPK section in Instructions
|