Searched refs:SPI_MEM_BUSWIDTH_1_LINE (Results 1 – 3 of 3) sorted by relevance
42 op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_reg()45 op.addr.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_reg()46 op.data.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_reg()135 op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_reset()151 op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_read_id()155 op.data.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_read_id()171 op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_load_page()174 op.addr.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_load_page()278 spinand_dev.spi_read_cache_op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_init()280 spinand_dev.spi_read_cache_op.addr.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_init()[all …]
45 op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nor_reg()46 op.data.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nor_reg()332 nor_dev.read_op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nor_init()334 nor_dev.read_op.addr.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nor_init()335 nor_dev.read_op.data.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nor_init()
14 #define SPI_MEM_BUSWIDTH_1_LINE 1U macro