Searched refs:SPSR_und (Results 1 – 17 of 17) sorted by relevance
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 86 @ CHECK-ARM: mrs r12, SPSR_und @ encoding: [0x00,0xc3,0x46,0xe1]
89 @ CHECK-THUMB: mrs r12, SPSR_und @ encoding: [0xf6,0xf3,0x30,0x8c]
196 @ CHECK-ARM: msr SPSR_und, r12 @ encoding: [0x0c,0xf3,0x66,0xe1]
199 @ CHECK-THUMB: msr SPSR_und, r12 @ encoding: [0x9c,0xf3,0x30,0x86]
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| /external/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 86 @ CHECK-ARM: mrs r12, SPSR_und @ encoding: [0x00,0xc3,0x46,0xe1]
89 @ CHECK-THUMB: mrs r12, SPSR_und @ encoding: [0xf6,0xf3,0x30,0x8c]
196 @ CHECK-ARM: msr SPSR_und, r12 @ encoding: [0x0c,0xf3,0x66,0xe1]
199 @ CHECK-THUMB: msr SPSR_und, r12 @ encoding: [0x9c,0xf3,0x30,0x86]
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-thumb.txt | 61 @ CHECK: mrs r12, SPSR_und
138 @ CHECK: msr SPSR_und, r12
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| D | move-banked-regs-arm.txt | 62 @ CHECK: mrs r12, SPSR_und
136 @ CHECK: msr SPSR_und, r12
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-arm.txt | 62 @ CHECK: mrs r12, SPSR_und
136 @ CHECK: msr SPSR_und, r12
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| D | move-banked-regs-thumb.txt | 61 @ CHECK: mrs r12, SPSR_und
138 @ CHECK: msr SPSR_und, r12
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| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.cc | 350 case SPSR_und: in GetName()
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| D | instructions-aarch32.h | 819 SPSR_und = 0x36, enumerator
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| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 3811 msr SPSR_und, x12
4359 mrs x9, SPSR_und
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| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 3825 msr SPSR_und, x12
4373 mrs x9, SPSR_und
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 431 SPSR_und = 57882,
2495 { "SPSR_und", 0xE21A, true, true, {} }, // 241
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 576 def : RWSysReg<"SPSR_und", 0b11, 0b100, 0b0100, 0b0011, 0b010>;
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 3298 # CHECK: msr {{SPSR_und|SPSR_UND}}, x12
3590 # CHECK: mrs x9, {{SPSR_und|SPSR_UND}}
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| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 3285 # CHECK: msr {{SPSR_und|SPSR_UND}}, x12
3579 # CHECK: mrs x9, {{SPSR_und|SPSR_UND}}
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 850 def : RWSysReg<"SPSR_und", 0b11, 0b100, 0b0100, 0b0011, 0b010>;
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 855 def : RWSysReg<"SPSR_und", 0b11, 0b100, 0b0100, 0b0011, 0b010>;
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| /external/OpenCSD/decoder/tests/snapshots-ete/002-ack_test_scr/ |
| D | test_TARMAC | 477 215 clk cpu0 IT (179) 163a0dbc d51c4340 O EL3h_s : MSR SPSR_und,x0
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