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Searched refs:STFSU (Results 1 – 18 of 18) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp218 case PPC::STFSU: in decodeMemRIOperands()
/external/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp248 case PPC::STFSU: in decodeMemRIOperands()
/external/llvm-project/lld/ELF/Arch/
DPPC64.cpp59 STFSU = 53, enumerator
520 case STFSU: in isInstructionUpdateForm()
/external/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp339 case PPC::STFSU: in decodeMemRIOperands()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenMCCodeEmitter.inc1593 UINT64_C(3556769792), // STFSU
2792 case PPC::STFSU:
8003 CEFBS_None, // STFSU = 1580
DPPCGenAsmWriter.inc3248 201533574U, // STFSU
5539 0U, // STFSU
DPPCGenDisassemblerTables.inc2351 /* 10953 */ MCD::OPC_Decode, 172, 12, 121, // Opcode: STFSU
DPPCGenInstrInfo.inc1595 STFSU = 1580,
4564 …<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo249, -1 ,nullptr }, // Inst #1580 = STFSU
DPPCGenAsmMatcher.inc6336 …{ 9518 /* stfsu */, PPC::STFSU, Convert__imm_95_0__RegF4RC1_0__DispRI1_1__RegGxRCNoR01_2, AMFBS_No…
DPPCGenDAGISel.inc1813 /* 4128*/ OPC_MorphNodeTo1, TARGET_VAL(PPC::STFSU), 0|OPFL_Chain|OPFL_MemRefs,
1816 …// Dst: (STFSU:{ *:[iPTR] } ?:{ *:[f32] }:$rS, iaddroff:{ *:[iPTR] }:$ptroff, ?:{ *:[iPTR] }:$ptrr…
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dconvert-rr-to-ri-instrs.mir5885 ; CHECK: STFSU %1, 111, %0
5892 ; CHECK: STFSU %1, 987, %0
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp3312 case PPC::STFSUX: III.ImmOpcode = PPC::STFSU; break; in instrHasImmForm()
DPPCInstrInfo.td2156 def STFSU : DForm_1<53, (outs ptr_rc_nor0:$ea_res), (ins f4rc:$rS, memri:$dst),
2175 (STFSU $rS, iaddroff:$ptroff, $ptrreg)>;
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.td1813 def STFSU : DForm_1<53, (outs ptr_rc_nor0:$ea_res), (ins f4rc:$rS, memri:$dst),
1831 (STFSU $rS, iaddroff:$ptroff, $ptrreg)>;
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp3745 case PPC::STFSUX: III.ImmOpcode = PPC::STFSU; break; in instrHasImmForm()
DPPCInstrInfo.td2348 def STFSU : DForm_1<53, (outs ptr_rc_nor0:$ea_res), (ins f4rc:$rS, memri:$dst),
2367 (STFSU $rS, iaddroff:$ptroff, $ptrreg)>;
/external/capstone/arch/PowerPC/
DPPCGenAsmWriter.inc1089 84057001U, // STFSU
2611 0U, // STFSU
DPPCGenDisassemblerTables.inc1554 /* 6409 */ MCD_OPC_Decode, 173, 8, 83, // Opcode: STFSU