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Searched refs:SVE_POW2 (Results 1 – 5 of 5) sorted by relevance

/external/vixl/test/aarch64/
Dtest-disasm-sve-aarch64.cc418 COMPARE_MACRO(Cntb(x7, SVE_POW2), "cntb x7, pow2"); in TEST()
427 COMPARE_MACRO(Cntb(x7, SVE_POW2, 1), "cntb x7, pow2"); in TEST()
437 COMPARE_MACRO(Cntd(xzr, SVE_POW2), "cntd xzr, pow2"); in TEST()
449 COMPARE_MACRO(Decb(x4, SVE_POW2), "decb x4, pow2"); in TEST()
458 COMPARE_MACRO(Decb(x4, SVE_POW2, 1), "decb x4, pow2"); in TEST()
468 COMPARE_MACRO(Decd(xzr, SVE_POW2), "decd xzr, pow2"); in TEST()
474 COMPARE_MACRO(Incb(x17, SVE_POW2), "incb x17, pow2"); in TEST()
483 COMPARE_MACRO(Incb(x17, SVE_POW2, 1), "incb x17, pow2"); in TEST()
493 COMPARE_MACRO(Incd(xzr, SVE_POW2), "incd xzr, pow2"); in TEST()
505 COMPARE_MACRO(Sqdecb(x12, w12, SVE_POW2), "sqdecb x12, w12, pow2"); in TEST()
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Dtest-assembler-sve-aarch64.cc3410 __ Ptrue(p[0], SVE_POW2, s); in PtrueHelper()
3788 (masm->*cnt)(Register(0, sizeof(T) * kBitsPerByte), SVE_POW2, multiplier); in GenerateCntSequence()
4259 (masm.*cnt)(x0, w0, SVE_POW2, multiplier); in QIncDecXWHelper()
4421 (masm.*fn)(z16.WithLaneSize(lane_size_in_bits), SVE_POW2, multiplier); in IncDecZHelper()
4438 (masm.*cnt)(x0, SVE_POW2, multiplier); in IncDecZHelper()
7118 __ Ptrue(p3.VnS(), SVE_POW2); in TEST_SVE()
7322 __ Ptrue(p2.VnS(), SVE_POW2); in TEST_SVE()
7694 __ Ptrue(p2.VnS(), SVE_POW2); in TEST_SVE()
8128 __ Ptrue(p2.VnS(), SVE_POW2); in TEST_SVE()
8590 __ Ptrue(p1.VnH(), SVE_POW2); in TEST_SVE()
[all …]
/external/vixl/src/aarch64/
Dconstants-aarch64.h534 SVE_POW2 = 0x0, enumerator
Ddisasm-aarch64.cc10357 case SVE_POW2: in SubstituteImmediateField()
Dlogic-aarch64.cc7357 case SVE_POW2: in GetPredicateConstraintLaneCount()